From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f66.google.com (mail-lf0-f66.google.com [209.85.215.66]) by dpdk.org (Postfix) with ESMTP id 2D2711B4BA for ; Fri, 29 Jun 2018 15:54:14 +0200 (CEST) Received: by mail-lf0-f66.google.com with SMTP id m12-v6so6298393lfc.10 for ; Fri, 29 Jun 2018 06:54:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bb0WXuTybfPE5wmSh4PlFqB0LfNZw9JYypanDyzqf/o=; b=lkMyXEYtSsLQCwMjwqeGjVgRY4CerMYHjDfRISjRG5IDJjl02ONfeb6QvEG3DOzmkp fLcvZiLLCoOFjZmINxWVNjUpdLtBoAfYn7hkpJDpIIPaipRGllTWEG5sCpmy4CTqpSQr V+Ev2QDFLWzPVMpCy4dNlxygad5bRMZdsJj6dqEnUk2UAROLrisIwXEzS6PALF6VTsqo x09u8gBuhOFAwOX+7vvzzCYF2l3/p7skRJwch57Ew+/ju9uHUtzrNy1C0PG/gdNZFJXz mHF3nR3eQOPk0XC3jYwtD94fnP1LIC5ij066lI2ZTSVE24rRIg71BkxmbnQfFBbhU0So 7KuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bb0WXuTybfPE5wmSh4PlFqB0LfNZw9JYypanDyzqf/o=; b=qMkrCUF+L3dbQsueh9cy5jdCNe4XjY2cEPT2D0C8FoKmjIhxV950IJEba9b5EbvktW J67Cm5A/Cum2QPS78Z9+553zzVqqm7o+yHVsWFaFt4LpRrPhW9765l15h00QkvOFTfV5 cI0XB5UBYV9Kwd15lP4aFgBenwOvRzhrMFlEOUJR2loKrp7J/BzgrTjaKEGj+//YZBkd 8jwuZhnnyD0bmSYskNIhB3YMnMu47bCmLXbrGOIM+jXF9+GFZtndd0mdYo8trtsPZn4v HSjZevEJVoEdeJHkhJYOIVKMbmxwPkggiVeiTN/BaLG4k2Yovf/j5fZ8WNMGK/MJ1SGe lrcA== X-Gm-Message-State: APt69E3UNR+wmJRo05b+oXr4LO92MN1glxEZ/slBS8j9+gzNsStgdcIO R6khH89E+X4JO3r4voNyYU4PdCnucHZiPg== X-Google-Smtp-Source: AAOMgpcfQggiy2r5WdQrpQgMZQ6AU03fAFXvcr0N0hxh1vazbm7ek5XhtrrWwVhOREnzAUjOiKBdhw== X-Received: by 2002:a19:4e06:: with SMTP id c6-v6mr10384821lfb.30.1530280453631; Fri, 29 Jun 2018 06:54:13 -0700 (PDT) Received: from rafalkozik.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v136-v6sm114122lfa.10.2018.06.29.06.54.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 29 Jun 2018 06:54:12 -0700 (PDT) From: Rafal Kozik To: dev@dpdk.org Cc: mw@semihalf.com, mk@semihalf.com, gtzalik@amazon.com, evgenys@amazon.com, matua@amazon.com, igorch@amazon.com, thomas@monjalon.net, ferruh.yigit@intel.com, Kozik Date: Fri, 29 Jun 2018 15:54:05 +0200 Message-Id: <1530280448-12920-2-git-send-email-rk@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530280448-12920-1-git-send-email-rk@semihalf.com> References: <1530267873-7236-2-git-send-email-rk@semihalf.com> <1530280448-12920-1-git-send-email-rk@semihalf.com> Subject: [dpdk-dev] [PATCH v5 1/4] igb_uio: add wc option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jun 2018 13:54:14 -0000 From: Kozik Write combining (WC) increases NIC performance by making better utilization of PCI bus, but cannot be use by all PMD. To get internal_addr memory need to be mapped. But as memory could not be mapped twice: with and without WC it should be skipped for WC. [1] To do not spoil other drivers that potentially could use internal_addr, parameter wc_activate adds possibility to skip it for those PMDs, that do not use it. [1] https://www.kernel.org/doc/ols/2008/ols2008v2-pages-135-144.pdf section 5.3 and 5.4 Signed-off-by: Rafal Kozik Acked-by: Bruce Richardson Acked-by: Ferruh Yigit --- kernel/linux/igb_uio/igb_uio.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/kernel/linux/igb_uio/igb_uio.c b/kernel/linux/igb_uio/igb_uio.c index b3233f1..3398eac 100644 --- a/kernel/linux/igb_uio/igb_uio.c +++ b/kernel/linux/igb_uio/igb_uio.c @@ -30,6 +30,7 @@ struct rte_uio_pci_dev { int refcnt; }; +static int wc_activate; static char *intr_mode; static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX; /* sriov sysfs */ @@ -375,9 +376,13 @@ igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info, len = pci_resource_len(dev, pci_bar); if (addr == 0 || len == 0) return -1; - internal_addr = ioremap(addr, len); - if (internal_addr == NULL) - return -1; + if (wc_activate == 0) { + internal_addr = ioremap(addr, len); + if (internal_addr == NULL) + return -1; + } else { + internal_addr = NULL; + } info->mem[n].name = name; info->mem[n].addr = addr; info->mem[n].internal_addr = internal_addr; @@ -626,6 +631,9 @@ igbuio_pci_init_module(void) return -EINVAL; } + if (wc_activate != 0) + pr_info("wc_activate is set\n"); + ret = igbuio_config_intr_mode(intr_mode); if (ret < 0) return ret; @@ -650,6 +658,12 @@ MODULE_PARM_DESC(intr_mode, " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n" "\n"); +module_param(wc_activate, int, 0); +MODULE_PARM_DESC(wc_activate, +"Activate support for write combining (WC) (default=0)\n" +" 0 - disable\n" +" other - enable\n"); + MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards"); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Intel Corporation"); -- 2.7.4