From: Fiona Trahe <fiona.trahe@intel.com>
To: dev@dpdk.org
Cc: pablo.de.lara.guarch@intel.com, fiona.trahe@intel.com,
tomaszx.jozwiak@intel.com
Subject: [dpdk-dev] [PATCH] compress/qat: enable dynamic huffman encoding
Date: Fri, 20 Jul 2018 18:46:31 +0100 [thread overview]
Message-ID: <1532108791-20683-1-git-send-email-fiona.trahe@intel.com> (raw)
Enable dynamic huffman encoding in the QAT comp PMD.
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
---
config/common_base | 1 +
config/rte_config.h | 1 +
doc/guides/compressdevs/features/qat.ini | 1 +
doc/guides/compressdevs/qat_comp.rst | 8 +--
drivers/common/qat/qat_device.c | 3 +
drivers/common/qat/qat_device.h | 6 ++
drivers/compress/qat/qat_comp.c | 39 +++++++----
drivers/compress/qat/qat_comp.h | 13 ++++
drivers/compress/qat/qat_comp_pmd.c | 109 ++++++++++++++++++++++++++++++-
9 files changed, 163 insertions(+), 18 deletions(-)
diff --git a/config/common_base b/config/common_base
index 6d82b91..2f88e34 100644
--- a/config/common_base
+++ b/config/common_base
@@ -500,6 +500,7 @@ CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
#
CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
+CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
#
# Compile PMD for virtio crypto devices
diff --git a/config/rte_config.h b/config/rte_config.h
index a8e4797..c93d508 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -90,6 +90,7 @@
/* Max. number of QuickAssist devices which can be attached */
#define RTE_PMD_QAT_MAX_PCI_DEVICES 48
#define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16
+#define RTE_PMD_QAT_COMP_IM_BUFFER_SIZE 65536
/* virtio crypto defines */
#define RTE_MAX_VIRTIO_CRYPTO 32
diff --git a/doc/guides/compressdevs/features/qat.ini b/doc/guides/compressdevs/features/qat.ini
index 5cd4524..6b1e7f9 100644
--- a/doc/guides/compressdevs/features/qat.ini
+++ b/doc/guides/compressdevs/features/qat.ini
@@ -13,3 +13,4 @@ Adler32 = Y
Crc32 = Y
Adler32&Crc32 = Y
Fixed = Y
+Dynamic = Y
diff --git a/doc/guides/compressdevs/qat_comp.rst b/doc/guides/compressdevs/qat_comp.rst
index 8b1270b..17e2bb4 100644
--- a/doc/guides/compressdevs/qat_comp.rst
+++ b/doc/guides/compressdevs/qat_comp.rst
@@ -18,11 +18,7 @@ QAT compression PMD has support for:
Compression/Decompression algorithm:
- * DEFLATE
-
-Huffman code type:
-
- * FIXED
+ * DEFLATE - using Fixed and Dynamic Huffman encoding
Window size support:
@@ -37,7 +33,7 @@ Limitations
* Compressdev level 0, no compression, is not supported.
-* Dynamic Huffman encoding is not yet supported.
+* Dynamic Huffman encoding is supported up to a maximum payload size of 64Kb.
Installation
------------
diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c
index f32d723..cbb5d79 100644
--- a/drivers/common/qat/qat_device.c
+++ b/drivers/common/qat/qat_device.c
@@ -7,6 +7,7 @@
#include "qat_device.h"
#include "adf_transport_access_macros.h"
#include "qat_sym_pmd.h"
+#include "qat_comp_pmd.h"
/* Hardware device information per generation */
__extension__
@@ -14,11 +15,13 @@ struct qat_gen_hw_data qat_gen_config[] = {
[QAT_GEN1] = {
.dev_gen = QAT_GEN1,
.qp_hw_data = qat_gen1_qps,
+ .comp_num_im_bufs_required = QAT_NUM_INTERM_BUFS_GEN1
},
[QAT_GEN2] = {
.dev_gen = QAT_GEN2,
.qp_hw_data = qat_gen1_qps,
/* gen2 has same ring layout as gen1 */
+ .comp_num_im_bufs_required = QAT_NUM_INTERM_BUFS_GEN2
},
};
diff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h
index 9599fc5..41f874b 100644
--- a/drivers/common/qat/qat_device.h
+++ b/drivers/common/qat/qat_device.h
@@ -16,6 +16,11 @@
#define QAT_DEV_NAME_MAX_LEN 64
+enum qat_comp_num_im_buffers {
+ QAT_NUM_INTERM_BUFS_GEN1 = 12,
+ QAT_NUM_INTERM_BUFS_GEN2 = 20
+};
+
/*
* This struct holds all the data about a QAT pci device
* including data about all services it supports.
@@ -67,6 +72,7 @@ struct qat_pci_device {
struct qat_gen_hw_data {
enum qat_device_gen dev_gen;
const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
+ enum qat_comp_num_im_buffers comp_num_im_bufs_required;
};
extern struct qat_gen_hw_data qat_gen_config[];
diff --git a/drivers/compress/qat/qat_comp.c b/drivers/compress/qat/qat_comp.c
index cbf7614..df3180b 100644
--- a/drivers/compress/qat/qat_comp.c
+++ b/drivers/compress/qat/qat_comp.c
@@ -192,7 +192,7 @@ static void qat_comp_create_req_hdr(struct icp_qat_fw_comn_req_hdr *header,
}
static int qat_comp_create_templates(struct qat_comp_xform *qat_xform,
- const struct rte_memzone *interm_buff_mz __rte_unused,
+ const struct rte_memzone *interm_buff_mz,
const struct rte_comp_xform *xform)
{
struct icp_qat_fw_comp_req *comp_req;
@@ -280,10 +280,20 @@ static int qat_comp_create_templates(struct qat_comp_xform *qat_xform,
ICP_QAT_FW_COMN_CURR_ID_SET(&comp_req->comp_cd_ctrl,
ICP_QAT_FW_SLICE_COMP);
} else if (qat_xform->qat_comp_request_type ==
- QAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS) {
+ QAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS) {
- QAT_LOG(ERR, "Dynamic huffman encoding not supported");
- return -EINVAL;
+ ICP_QAT_FW_COMN_NEXT_ID_SET(&comp_req->comp_cd_ctrl,
+ ICP_QAT_FW_SLICE_XLAT);
+ ICP_QAT_FW_COMN_CURR_ID_SET(&comp_req->comp_cd_ctrl,
+ ICP_QAT_FW_SLICE_COMP);
+
+ ICP_QAT_FW_COMN_NEXT_ID_SET(&comp_req->u2.xlt_cd_ctrl,
+ ICP_QAT_FW_SLICE_DRAM_WR);
+ ICP_QAT_FW_COMN_CURR_ID_SET(&comp_req->u2.xlt_cd_ctrl,
+ ICP_QAT_FW_SLICE_XLAT);
+
+ comp_req->u1.xlt_pars.inter_buff_ptr =
+ interm_buff_mz->phys_addr;
}
#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
@@ -334,20 +344,27 @@ qat_comp_private_xform_create(struct rte_compressdev *dev,
(struct qat_comp_xform *)*private_xform;
if (xform->type == RTE_COMP_COMPRESS) {
- if (xform->compress.deflate.huffman ==
- RTE_COMP_HUFFMAN_DYNAMIC) {
- QAT_LOG(ERR,
- "QAT device doesn't support dynamic compression");
- return -ENOTSUP;
- }
if (xform->compress.deflate.huffman == RTE_COMP_HUFFMAN_FIXED ||
((xform->compress.deflate.huffman == RTE_COMP_HUFFMAN_DEFAULT)
- && qat->interm_buff_mz == NULL))
+ && qat->interm_buff_mz == NULL))
qat_xform->qat_comp_request_type =
QAT_COMP_REQUEST_FIXED_COMP_STATELESS;
+ else if ((xform->compress.deflate.huffman ==
+ RTE_COMP_HUFFMAN_DYNAMIC ||
+ xform->compress.deflate.huffman ==
+ RTE_COMP_HUFFMAN_DEFAULT) &&
+ qat->interm_buff_mz != NULL)
+
+ qat_xform->qat_comp_request_type =
+ QAT_COMP_REQUEST_DYNAMIC_COMP_STATELESS;
+ else {
+ QAT_LOG(ERR,
+ "IM buffers needed for dynamic deflate. Set size in config file");
+ return -EINVAL;
+ }
} else {
qat_xform->qat_comp_request_type = QAT_COMP_REQUEST_DECOMPRESS;
diff --git a/drivers/compress/qat/qat_comp.h b/drivers/compress/qat/qat_comp.h
index 8d315ef..99a4462 100644
--- a/drivers/compress/qat/qat_comp.h
+++ b/drivers/compress/qat/qat_comp.h
@@ -15,6 +15,10 @@
#include "icp_qat_fw_comp.h"
#include "icp_qat_fw_la.h"
+#define QAT_64_BYTE_ALIGN_MASK (~0x3f)
+#define QAT_64_BYTE_ALIGN (64)
+#define QAT_NUM_BUFS_IN_IM_SGL 1
+
#define ERR_CODE_QAT_COMP_WRONG_FW -99
enum qat_comp_request_type {
@@ -24,6 +28,15 @@ enum qat_comp_request_type {
REQ_COMP_END
};
+struct array_of_ptrs {
+ phys_addr_t pointer[0];
+};
+
+struct qat_inter_sgl {
+ qat_sgl_hdr;
+ struct qat_flat_buf buffers[QAT_NUM_BUFS_IN_IM_SGL];
+} __rte_packed __rte_cache_aligned;
+
struct qat_comp_sgl {
qat_sgl_hdr;
struct qat_flat_buf buffers[RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS];
diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
index b89975f..76ae1f0 100644
--- a/drivers/compress/qat/qat_comp_pmd.c
+++ b/drivers/compress/qat/qat_comp_pmd.c
@@ -14,6 +14,7 @@ static const struct rte_compressdev_capabilities qat_comp_gen_capabilities[] = {
RTE_COMP_FF_CRC32_ADLER32_CHECKSUM |
RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
RTE_COMP_FF_HUFFMAN_FIXED |
+ RTE_COMP_FF_HUFFMAN_DYNAMIC |
RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
RTE_COMP_FF_OOP_LB_IN_SGL_OUT,
@@ -112,7 +113,7 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
/* store a link to the qp in the qat_pci_device */
qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][qp_id]
- = *qp_addr;
+ = *qp_addr;
qp = (struct qat_qp *)*qp_addr;
@@ -135,6 +136,91 @@ qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
return ret;
}
+
+static const struct rte_memzone *
+qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev,
+ uint32_t buff_size)
+{
+ char inter_buff_mz_name[RTE_MEMZONE_NAMESIZE];
+ const struct rte_memzone *memzone;
+ uint8_t *mz_start = NULL;
+ phys_addr_t mz_start_phys = 0;
+ struct array_of_ptrs *array_of_pointers;
+ int size_of_ptr_array;
+ uint32_t full_size;
+ uint32_t offset_of_sgls, offset_of_flat_buffs = 0;
+ int i;
+ int num_im_sgls = qat_gen_config[
+ comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required;
+
+ QAT_LOG(DEBUG, "QAT COMP device %s needs %d sgls",
+ comp_dev->qat_dev->name, num_im_sgls);
+ snprintf(inter_buff_mz_name, RTE_MEMZONE_NAMESIZE,
+ "%s_inter_buff", comp_dev->qat_dev->name);
+ memzone = rte_memzone_lookup(inter_buff_mz_name);
+ if (memzone != NULL) {
+ QAT_LOG(DEBUG, "QAT COMP im buffer memzone created already");
+ return memzone;
+ }
+
+ /* Create a memzone to hold intermediate buffers and associated
+ * meta-data needed by the firmware. The memzone contains:
+ * - a list of num_im_sgls physical pointers to sgls
+ * - the num_im_sgl sgl structures, each pointing to 2 flat buffers
+ * - the flat buffers: num_im_sgl * 2
+ * where num_im_sgls depends on the hardware generation of the device
+ */
+
+ size_of_ptr_array = num_im_sgls * sizeof(phys_addr_t);
+ offset_of_sgls = (size_of_ptr_array + (~QAT_64_BYTE_ALIGN_MASK))
+ & QAT_64_BYTE_ALIGN_MASK;
+ offset_of_flat_buffs =
+ offset_of_sgls + num_im_sgls * sizeof(struct qat_inter_sgl);
+ full_size = offset_of_flat_buffs +
+ num_im_sgls * buff_size * QAT_NUM_BUFS_IN_IM_SGL;
+
+ memzone = rte_memzone_reserve_aligned(inter_buff_mz_name, full_size,
+ comp_dev->compressdev->data->socket_id,
+ RTE_MEMZONE_2MB, QAT_64_BYTE_ALIGN);
+ if (memzone == NULL) {
+ QAT_LOG(ERR, "Can't allocate intermediate buffers"
+ " for device %s", comp_dev->qat_dev->name);
+ return NULL;
+ }
+
+ mz_start = (uint8_t *)memzone->addr;
+ mz_start_phys = memzone->phys_addr;
+ QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = %lx, size required %d,"
+ "size created %ld",
+ inter_buff_mz_name, mz_start, mz_start_phys,
+ full_size, memzone->len);
+
+ array_of_pointers = (struct array_of_ptrs *)mz_start;
+ for (i = 0; i < num_im_sgls; i++) {
+ uint32_t curr_sgl_offset =
+ offset_of_sgls + i * sizeof(struct qat_inter_sgl);
+ struct qat_inter_sgl *sgl =
+ (struct qat_inter_sgl *)(mz_start + curr_sgl_offset);
+ array_of_pointers->pointer[i] = mz_start_phys + curr_sgl_offset;
+
+ sgl->num_bufs = QAT_NUM_BUFS_IN_IM_SGL;
+ sgl->num_mapped_bufs = 0;
+ sgl->resrvd = 0;
+ sgl->buffers[0].addr = mz_start_phys + offset_of_flat_buffs +
+ i * buff_size * QAT_NUM_BUFS_IN_IM_SGL;
+ sgl->buffers[0].len = buff_size;
+ sgl->buffers[0].resrvd = 0;
+
+
+ QAT_LOG(DEBUG, " : array_of_pointers->pointer[i]"
+ "= %lx", array_of_pointers->pointer[i]);
+ QAT_LOG(DEBUG, " : sgl[%i] = %p", i, sgl);
+ QAT_LOG(DEBUG, " : sgl->buffers[0].addr = %lx, len=%d",
+ sgl->buffers[0].addr, sgl->buffers[0].len);
+ }
+ return memzone;
+}
+
static struct rte_mempool *
qat_comp_create_xform_pool(struct qat_comp_dev_private *comp_dev,
uint32_t num_elements)
@@ -176,6 +262,12 @@ qat_comp_create_xform_pool(struct qat_comp_dev_private *comp_dev,
static void
_qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev)
{
+ /* Free intermediate buffers */
+ if (comp_dev->interm_buff_mz) {
+ rte_memzone_free(comp_dev->interm_buff_mz);
+ comp_dev->interm_buff_mz = NULL;
+ }
+
/* Free private_xform pool */
if (comp_dev->xformpool) {
/* Free internal mempool for private xforms */
@@ -197,6 +289,21 @@ qat_comp_dev_config(struct rte_compressdev *dev,
return -EINVAL;
}
+ if (RTE_PMD_QAT_COMP_IM_BUFFER_SIZE == 0) {
+ QAT_LOG(WARNING,
+ "RTE_PMD_QAT_COMP_IM_BUFFER_SIZE = 0 in config file, so"
+ " QAT device can't be used for Dynamic Deflate. "
+ "Did you really intend to do this?");
+ } else {
+ comp_dev->interm_buff_mz =
+ qat_comp_setup_inter_buffers(comp_dev,
+ RTE_PMD_QAT_COMP_IM_BUFFER_SIZE);
+ if (comp_dev->interm_buff_mz == NULL) {
+ ret = -ENOMEM;
+ goto error_out;
+ }
+ }
+
comp_dev->xformpool = qat_comp_create_xform_pool(comp_dev,
config->max_nb_priv_xforms);
if (comp_dev->xformpool == NULL) {
--
2.7.4
next reply other threads:[~2018-07-20 17:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 17:46 Fiona Trahe [this message]
2018-10-05 16:18 ` [dpdk-dev] [PATCH v2] " Fiona Trahe
2018-10-09 11:01 ` Akhil Goyal
2018-10-09 14:09 ` Trahe, Fiona
2018-10-12 11:39 ` Akhil Goyal
2018-10-11 17:03 ` [dpdk-dev] [PATCH v3] " Fiona Trahe
2018-10-15 23:16 ` [dpdk-dev] [PATCH v4] " Fiona Trahe
2018-10-17 10:29 ` Kusztal, ArkadiuszX
2018-10-17 20:48 ` [dpdk-dev] [PATCH v5] " Fiona Trahe
2018-10-24 14:15 ` Akhil Goyal
2018-10-24 21:30 ` Thomas Monjalon
2018-10-25 0:40 ` Trahe, Fiona
2018-10-25 6:45 ` Thomas Monjalon
2018-10-25 1:30 ` [dpdk-dev] [PATCH v6] " Fiona Trahe
2018-10-25 7:34 ` Akhil Goyal
2018-10-26 18:18 ` [dpdk-dev] [PATCH v7] " Fiona Trahe
2018-10-27 0:06 ` Thomas Monjalon
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