From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from netronome.com (host-79-78-33-110.static.as9105.net [79.78.33.110]) by dpdk.org (Postfix) with ESMTP id 2F87C4CBD; Thu, 30 Aug 2018 17:22:28 +0200 (CEST) Received: from netronome.com (localhost [127.0.0.1]) by netronome.com (8.14.4/8.14.4/Debian-4.1ubuntu1) with ESMTP id w7UFLZIP021919; Thu, 30 Aug 2018 16:21:35 +0100 Received: (from alucero@localhost) by netronome.com (8.14.4/8.14.4/Submit) id w7UFLZXb021918; Thu, 30 Aug 2018 16:21:35 +0100 From: Alejandro Lucero To: dev@dpdk.org Cc: stable@dpdk.org Date: Thu, 30 Aug 2018 16:21:30 +0100 Message-Id: <1535642492-21831-4-git-send-email-alejandro.lucero@netronome.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1535642492-21831-1-git-send-email-alejandro.lucero@netronome.com> References: <1535642492-21831-1-git-send-email-alejandro.lucero@netronome.com> Subject: [dpdk-dev] [PATCH 3/5] bus/pci: use IOVAs check when setting IOVA mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Aug 2018 15:22:28 -0000 Although VT-d emulation currently only supports 39 bits, it could be iovas being within that supported range. This patch allows IOVA mode in such a case. Indeed, memory initialization code can be modified for using lower virtual addresses than those used by the kernel for 64 bits processes by default, and therefore memsegs iovas can use 39 bits or less for most system. And this is likely 100% true for VMs. Signed-off-by: Alejandro Lucero --- drivers/bus/pci/linux/pci.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c index 04648ac..215dc10 100644 --- a/drivers/bus/pci/linux/pci.c +++ b/drivers/bus/pci/linux/pci.c @@ -588,10 +588,11 @@ fclose(fp); mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1; - if (mgaw < X86_VA_WIDTH) - return false; - return true; + if (!rte_eal_check_dma_mask(mgaw)) + return true; + else + return false; } #elif defined(RTE_ARCH_PPC_64) static bool @@ -615,13 +616,17 @@ { struct rte_pci_device *dev = NULL; struct rte_pci_driver *drv = NULL; + int iommu_dma_mask_check_done = 0; FOREACH_DRIVER_ON_PCIBUS(drv) { FOREACH_DEVICE_ON_PCIBUS(dev) { if (!rte_pci_match(drv, dev)) continue; - if (!pci_one_device_iommu_support_va(dev)) - return false; + if (!iommu_dma_mask_check_done) { + if (!pci_one_device_iommu_support_va(dev)) + return false; + iommu_dma_mask_check_done = 1; + } } } return true; -- 1.9.1