From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ea0-f170.google.com (mail-ea0-f170.google.com [209.85.215.170]) by dpdk.org (Postfix) with ESMTP id A174E5934 for ; Fri, 29 Nov 2013 13:37:36 +0100 (CET) Received: by mail-ea0-f170.google.com with SMTP id k10so6801382eaj.15 for ; Fri, 29 Nov 2013 04:38:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding:content-type; bh=ZSjfgG76XqFKhqM8MIt3VrPRvPhfdOEtOMiLpf3nSuI=; b=dTHzcFFwv+lIg1Zjm14hZ5Ai/l1lmRvrOR/biYb0DkTfEQKNWOUTm7Pm/vbjXQ7CXP OpjJr0aA2qrvDgkx8WZAUYs41zB0Uu/SJo82ur3rf2ySO0mfN7a1rayuNMHCMuss3NQU K91cZmWelQmIhireOtNJHhnY9b7UcoXvU2eDEcHYP8dEeGimspH/az5oCa7E76dPwKPm E6XTBhTiRwB/NzBKcnlyAJ8hYt0irJ5wjyxzRCHpmvDGCgLoA1kyb5HlIj4UL6PEPdVA ildwVvxpYTxS4up6fiZjhSHSoEP2bdDWncrDQfIvovHJBpokIBuZz/+u3yLlPiDd0/Pw ogIA== X-Gm-Message-State: ALoCoQn4DVPlewf4pvWYN7O01mfolEMyGzFPCbalh+yTVgAU+b/KOHvRj2ToxqwOYx8hCL/NvdAd X-Received: by 10.14.5.133 with SMTP id 5mr2163101eel.84.1385728717393; Fri, 29 Nov 2013 04:38:37 -0800 (PST) Received: from x220.localnet (6wind.net2.nerim.net. [213.41.180.237]) by mx.google.com with ESMTPSA id v7sm23190975eel.2.2013.11.29.04.38.36 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Nov 2013 04:38:36 -0800 (PST) From: Thomas Monjalon To: Dmitry Vyal Date: Fri, 29 Nov 2013 13:39:44 +0100 Message-ID: <1535896.tMWsNx1bj7@x220> Organization: 6WIND User-Agent: KMail/4.11.2 (Linux/3.11.4-1-ARCH; KDE/4.11.2; x86_64; ; ) In-Reply-To: <3439195.NJQbpGS54N@x220> References: <528F4E41.2000405@gmail.com> <52987236.3020707@gmail.com> <3439195.NJQbpGS54N@x220> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] Sporadic errors while initializing NICs in example applications, dpdk-1.5.0r1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Nov 2013 12:37:36 -0000 29/11/2013 13:25, Thomas Monjalon : > 29/11/2013 14:53, Dmitry Vyal : > > On 11/28/2013 03:01 PM, Richardson, Bruce wrote: > > > [BR] Frequency changes should not affect timers for modern Intel CPUs. > > > Please see the " Intel(r) 64 and IA-32 Architectures Software > > > Developer's > > > Manual" Volume 3 > > > (http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-> > > i > > > a-32-architectures-software-developer-system-programming-manual-325384.p > > > df > > > ) , Section 17.13 for more details on this. > > > > Hmm, that's strange. I don't know how to interpret my observations then. > > I have access to two platforms, one is based on Intel(R) Xeon(R) CPU > > E3-1230 V2 @ 3.30GHz and another on Intel(R) Xeon(R) CPU E3-1270 v3 @ > > 3.50GHz. Both running ubuntu-12.04 server. I see repeating errors on NIC > > initialisation phase. The error frequency greatly reduces if I patch > > loop limit as I described earlier or if I call rte_power_init and > > rte_power_freq_max as Thomas suggested. > > > > But the only way to get rid of them completely is to set performance > > governor. > > Please check that your hardware do not support invariant TSC. > It would explain why you need to fix frequency. > > I attach a simple code to test CPU feature "Invariant TSC". It seems that the file is stripped on the mailing-list. Code inlined: #include #include #include #include int main() { uint32_t a = 0x80000000; uint32_t b, d; __asm__("cpuid;" :"=a"(b) :"0"(a)); if (b >= 0x80000007) { a = 0x80000007; __asm__("cpuid;" :"=a"(b), "=d"(d) :"0"(a)); if (d & (1<<8)) { printf("Invariant TSC is supported\n"); } else{ printf("Invariant TSC is NOT supported\n"); } } else { printf("No support for Advanced Power Management Information in CPUID\n"); } return 0; }