From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id E1DAB5F0D for ; Fri, 26 Oct 2018 04:16:40 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Oct 2018 19:16:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,426,1534834800"; d="scan'208";a="102770309" Received: from skx-yipeng.jf.intel.com ([10.54.81.175]) by orsmga001.jf.intel.com with ESMTP; 25 Oct 2018 19:16:37 -0700 From: Yipeng Wang To: bruce.richardson@intel.com Cc: stephen@networkplumber.org, dev@dpdk.org, yipeng1.wang@intel.com, honnappa.nagarahalli@arm.com, sameh.gobriel@intel.com Date: Thu, 25 Oct 2018 12:11:15 -0700 Message-Id: <1540494678-64299-4-git-send-email-yipeng1.wang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540494678-64299-1-git-send-email-yipeng1.wang@intel.com> References: <1540404570-102126-1-git-send-email-yipeng1.wang@intel.com> <1540494678-64299-1-git-send-email-yipeng1.wang@intel.com> Subject: [dpdk-dev] [PATCH v3 3/6] test/hash: test more corner cases in unit test X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Oct 2018 02:16:41 -0000 This commit improves the readwrite unit test to cover more corner cases and reduces the testing time by reducing the total key count. Signed-off-by: Yipeng Wang Acked-by: Bruce Richardson --- test/test/test_hash_readwrite.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/test/test/test_hash_readwrite.c b/test/test/test_hash_readwrite.c index a8fadd0..a45c669 100644 --- a/test/test/test_hash_readwrite.c +++ b/test/test/test_hash_readwrite.c @@ -18,8 +18,8 @@ #define RTE_RWTEST_FAIL 0 -#define TOTAL_ENTRY (16*1024*1024) -#define TOTAL_INSERT (15*1024*1024) +#define TOTAL_ENTRY (5*1024*1024) +#define TOTAL_INSERT (4.5*1024*1024) #define NUM_TEST 3 unsigned int core_cnt[NUM_TEST] = {2, 4, 8}; @@ -59,8 +59,10 @@ test_hash_readwrite_worker(__attribute__((unused)) void *arg) uint64_t i, offset; uint32_t lcore_id = rte_lcore_id(); uint64_t begin, cycles; - int ret; + int *ret; + ret = rte_malloc(NULL, sizeof(int) * + tbl_rw_test_param.num_insert, 0); for (i = 0; i < rte_lcore_count(); i++) { if (slave_core_ids[i] == lcore_id) break; @@ -79,13 +81,30 @@ test_hash_readwrite_worker(__attribute__((unused)) void *arg) tbl_rw_test_param.keys + i) > 0) break; - ret = rte_hash_add_key(tbl_rw_test_param.h, + ret[i - offset] = rte_hash_add_key(tbl_rw_test_param.h, tbl_rw_test_param.keys + i); - if (ret < 0) + if (ret[i - offset] < 0) + break; + + /* lookup a random key */ + uint32_t rand = rte_rand() % (i + 1 - offset); + + if (rte_hash_lookup(tbl_rw_test_param.h, + tbl_rw_test_param.keys + rand) != ret[rand]) + break; + + + if (rte_hash_del_key(tbl_rw_test_param.h, + tbl_rw_test_param.keys + rand) != ret[rand]) + break; + + ret[rand] = rte_hash_add_key(tbl_rw_test_param.h, + tbl_rw_test_param.keys + rand); + if (ret[rand] < 0) break; if (rte_hash_lookup(tbl_rw_test_param.h, - tbl_rw_test_param.keys + i) != ret) + tbl_rw_test_param.keys + rand) != ret[rand]) break; } -- 2.7.4