From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by dpdk.org (Postfix) with ESMTP id 75C9C5911 for ; Fri, 2 Nov 2018 12:21:40 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87520A78; Fri, 2 Nov 2018 04:21:39 -0700 (PDT) Received: from net-arm-c2400.shanghai.arm.com (net-arm-c2400.shanghai.arm.com [10.169.42.81]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B40323F71E; Fri, 2 Nov 2018 04:21:37 -0700 (PDT) From: Gavin Hu To: dev@dpdk.org Cc: thomas@monjalon.net, stephen@networkplumber.org, olivier.matz@6wind.com, chaozhu@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, jerin.jacob@caviumnetworks.com, Honnappa.Nagarahalli@arm.com, gavin.hu@arm.com Date: Fri, 2 Nov 2018 19:21:26 +0800 Message-Id: <1541157688-40012-1-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541066031-29125-1-git-send-email-gavin.hu@arm.com> References: <1541066031-29125-1-git-send-email-gavin.hu@arm.com> Subject: [dpdk-dev] [PATCH v5 0/2] ring library with c11 memory model bug fix and optimization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Nov 2018 11:21:40 -0000 v4->v5 1) Indicate the improvement by the change in the release note. v3->v4 1) Move the variable declarations to the beginning of the block. v2->v3 1) Reword the change and relocate it in the release note. v1->v2 1) Add the changes to the 18.11 release note. V1: Updated the ring library with C11 memory model including the following changes 1) Synchronize the load and store of the tail to ensure the enqueue/dequeue operations are really completed before seen by the observers on the other sides. 2) Move the atomic load of head above the loop for the first iteration,it is not unnecessary and degrade performance for the other iteration as the head was loaded in the failure case of CAS. Gavin Hu (2): ring: synchronize the load and store of the tail ring: move the atomic load of head above the loop doc/guides/rel_notes/release_18_11.rst | 7 +++++++ lib/librte_ring/rte_ring_c11_mem.h | 24 ++++++++++++++++++------ 2 files changed, 25 insertions(+), 6 deletions(-) -- 2.7.4