From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 9BBB3201; Wed, 14 Nov 2018 05:09:43 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2018 20:09:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,231,1539673200"; d="scan'208";a="280909575" Received: from unknown (HELO dpdk9.sh.intel.com) ([10.67.118.52]) by fmsmga006.fm.intel.com with ESMTP; 13 Nov 2018 20:09:41 -0800 From: Beilei Xing To: qi.z.zhang@intel.com, jingjing.wu@intel.com Cc: dev@dpdk.org, stable@dpdk.org Date: Wed, 14 Nov 2018 12:10:38 +0800 Message-Id: <1542168638-59416-1-git-send-email-beilei.xing@intel.com> X-Mailer: git-send-email 2.5.5 Subject: [dpdk-dev] [PATCH] net/i40e: fix X710 Rx issue after reading some registers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Nov 2018 04:09:44 -0000 There's an issue that X710 can't receive any packet after reading some special registers. That's because these registers are only valid for X722, read access for non-X722 will cause ECC error. Fixes: d9efd0136ac1 ("i40e: add EEPROM and registers dumping") Cc: stable@dpdk.org Signed-off-by: Beilei Xing --- drivers/net/i40e/i40e_ethdev.c | 33 +++++++++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 1c77906..686227e 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -11609,6 +11609,31 @@ i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) return 0; } +/** + * This function is used to check if the register is valid for non-X722 NIC. + * Below is the valid registers list for X722 only: + * 0x2b800--0x2bb00 + * 0x38700--0x38a00 + * 0x3d800--0x3db00 + * 0x208e00--0x209000 + * 0x20be00--0x20c000 + * 0x263c00--0x264000 + * 0x265c00--0x266000 + */ +static inline int i40e_valid_regs(uint32_t reg_offset) +{ + if (((reg_offset >= 0x2b800) && (reg_offset <= 0x2bb00)) || + ((reg_offset >= 0x38700) && (reg_offset <= 0x38a00)) || + ((reg_offset >= 0x3d800) && (reg_offset <= 0x3db00)) || + ((reg_offset >= 0x208e00) && (reg_offset <= 0x209000)) || + ((reg_offset >= 0x20be00) && (reg_offset <= 0x20c000)) || + ((reg_offset >= 0x263c00) && (reg_offset <= 0x264000)) || + ((reg_offset >= 0x265c00) && (reg_offset <= 0x266000))) + return 0; + else + return 1; +} + static int i40e_get_regs(struct rte_eth_dev *dev, struct rte_dev_reg_info *regs) { @@ -11650,8 +11675,12 @@ static int i40e_get_regs(struct rte_eth_dev *dev, reg_offset = arr_idx * reg_info->stride1 + arr_idx2 * reg_info->stride2; reg_offset += reg_info->base_addr; - ptr_data[reg_offset >> 2] = - I40E_READ_REG(hw, reg_offset); + if ((hw->mac.type != I40E_MAC_X722) && + !i40e_valid_regs(reg_offset)) + ptr_data[reg_offset >> 2] = 0; + else + ptr_data[reg_offset >> 2] = + I40E_READ_REG(hw, reg_offset); } } -- 2.5.5