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From: Xiaoyun Li <xiaoyun.li@intel.com>
To: qi.z.zhang@intel.com
Cc: dev@dpdk.org, Xiaoyun Li <xiaoyun.li@intel.com>
Subject: [dpdk-dev] [PATCH] net/ixgbe: adjust the RSS table
Date: Tue,  4 Dec 2018 12:37:57 +0800	[thread overview]
Message-ID: <1543898277-71597-1-git-send-email-xiaoyun.li@intel.com> (raw)

When starting the device, the RSS table is initialized. So the RSS
update before device_start would be overwritten. This patch allows users
to update the RSS reta table before device_start.

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
---
 drivers/net/ixgbe/ixgbe_ethdev.c | 11 +++++++++++
 drivers/net/ixgbe/ixgbe_ethdev.h |  3 +++
 drivers/net/ixgbe/ixgbe_rxtx.c   | 24 ++++++++++++++----------
 3 files changed, 28 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 91ba620..7493110 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -2790,6 +2790,8 @@ static void
 ixgbe_dev_stop(struct rte_eth_dev *dev)
 {
 	struct rte_eth_link link;
+	struct ixgbe_adapter *adapter =
+		(struct ixgbe_adapter *)dev->data->dev_private;
 	struct ixgbe_hw *hw =
 		IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct ixgbe_vf_info *vfinfo =
@@ -2850,6 +2852,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
 
 	/* reset hierarchy commit */
 	tm_conf->committed = false;
+
+	adapter->rss_reta_updated = 0;
 }
 
 /*
@@ -4779,6 +4783,8 @@ ixgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
 	uint8_t j, mask;
 	uint32_t reta, r;
 	uint16_t idx, shift;
+	struct ixgbe_adapter *adapter =
+		(struct ixgbe_adapter *)dev->data->dev_private;
 	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	uint32_t reta_reg;
 
@@ -4820,6 +4826,7 @@ ixgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
 		}
 		IXGBE_WRITE_REG(hw, reta_reg, reta);
 	}
+	adapter->rss_reta_updated = 1;
 
 	return 0;
 }
@@ -5143,6 +5150,8 @@ static void
 ixgbevf_dev_stop(struct rte_eth_dev *dev)
 {
 	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+	struct ixgbe_adapter *adapter =
+		(struct ixgbe_adapter *)dev->data->dev_private;
 	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 
@@ -5172,6 +5181,8 @@ ixgbevf_dev_stop(struct rte_eth_dev *dev)
 		rte_free(intr_handle->intr_vec);
 		intr_handle->intr_vec = NULL;
 	}
+
+	adapter->rss_reta_updated = 0;
 }
 
 static void
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h
index d0b9396..565c69c 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.h
+++ b/drivers/net/ixgbe/ixgbe_ethdev.h
@@ -490,6 +490,9 @@ struct ixgbe_adapter {
 	struct rte_timecounter      rx_tstamp_tc;
 	struct rte_timecounter      tx_tstamp_tc;
  	struct ixgbe_tm_conf        tm_conf;
+
+	/* For RSS reta table update */
+	uint8_t rss_reta_updated;
 };
 
 struct ixgbe_vf_representor {
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 7771d0e..9a79d18 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -3418,6 +3418,7 @@ static void
 ixgbe_rss_configure(struct rte_eth_dev *dev)
 {
 	struct rte_eth_rss_conf rss_conf;
+	struct ixgbe_adapter *adapter;
 	struct ixgbe_hw *hw;
 	uint32_t reta;
 	uint16_t i;
@@ -3426,6 +3427,7 @@ ixgbe_rss_configure(struct rte_eth_dev *dev)
 	uint32_t reta_reg;
 
 	PMD_INIT_FUNC_TRACE();
+	adapter = (struct ixgbe_adapter *)dev->data->dev_private;
 	hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
 	sp_reta_size = ixgbe_reta_size_get(hw->mac.type);
@@ -3435,16 +3437,18 @@ ixgbe_rss_configure(struct rte_eth_dev *dev)
 	 * The byte-swap is needed because NIC registers are in
 	 * little-endian order.
 	 */
-	reta = 0;
-	for (i = 0, j = 0; i < sp_reta_size; i++, j++) {
-		reta_reg = ixgbe_reta_reg_get(hw->mac.type, i);
-
-		if (j == dev->data->nb_rx_queues)
-			j = 0;
-		reta = (reta << 8) | j;
-		if ((i & 3) == 3)
-			IXGBE_WRITE_REG(hw, reta_reg,
-					rte_bswap32(reta));
+	if (adapter->rss_reta_updated == 0) {
+		reta = 0;
+		for (i = 0, j = 0; i < sp_reta_size; i++, j++) {
+			reta_reg = ixgbe_reta_reg_get(hw->mac.type, i);
+
+			if (j == dev->data->nb_rx_queues)
+				j = 0;
+			reta = (reta << 8) | j;
+			if ((i & 3) == 3)
+				IXGBE_WRITE_REG(hw, reta_reg,
+						rte_bswap32(reta));
+		}
 	}
 
 	/*
-- 
2.7.4

             reply	other threads:[~2018-12-04  4:57 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-04  4:37 Xiaoyun Li [this message]
2018-12-04  6:20 ` Zhang, Qi Z

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