From: Gavin Hu <gavin.hu@arm.com>
To: dev@dpdk.org
Cc: thomas@monjalon.net, jerin.jacob@caviumnetworks.com,
hemant.agrawal@nxp.com, Honnappa.Nagarahalli@arm.com,
gavin.hu@arm.com, stable@dpdk.org
Subject: [dpdk-dev] [PATCH v1] config: enable c11 memory model for ARMv8 meson
Date: Tue, 11 Dec 2018 11:55:50 +0800 [thread overview]
Message-ID: <1544500550-193166-1-git-send-email-gavin.hu@arm.com> (raw)
This patch makes the configuration based on makefile and the
configuration based on meson to be the same.
Fixes: c6e536e38437 ("build: add more implementers IDs and PNs for ARM")
Cc: stable@dpdk.org
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <Ruifeng.Wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
---
config/arm/meson.build | 3 +++
1 file changed, 3 insertions(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 3f91725..dae55d6 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -47,6 +47,7 @@ flags_common_default = [
flags_generic = [
['RTE_MACHINE', '"armv8a"'],
['RTE_MAX_LCORE', 256],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 128]]
flags_cavium = [
['RTE_MACHINE', '"thunderx"'],
@@ -57,11 +58,13 @@ flags_cavium = [
['RTE_USE_C11_MEM_MODEL', false]]
flags_dpaa = [
['RTE_MACHINE', '"dpaa"'],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16]]
flags_dpaa2 = [
['RTE_MACHINE', '"dpaa2"'],
+ ['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
['RTE_MAX_NUMA_NODES', 1],
['RTE_MAX_LCORE', 16],
--
2.7.4
next reply other threads:[~2018-12-11 3:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-11 3:55 Gavin Hu [this message]
2018-12-11 6:02 ` Honnappa Nagarahalli
2018-12-12 10:13 ` Bruce Richardson
2018-12-18 23:36 ` Thomas Monjalon
2018-12-19 5:11 ` Honnappa Nagarahalli
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