From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 33A10A00E6 for ; Thu, 8 Aug 2019 10:45:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3A5862952; Thu, 8 Aug 2019 10:45:33 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id B96642952 for ; Thu, 8 Aug 2019 10:45:30 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 01:45:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,360,1559545200"; d="scan'208";a="350108541" Received: from dpdk-rosen-02.sh.intel.com ([10.67.111.116]) by orsmga005.jf.intel.com with ESMTP; 08 Aug 2019 01:45:28 -0700 From: Rosen Xu To: dev@dpdk.org Cc: ferruh.yigit@intel.com, tianfei.zhang@intel.com, rosen.xu@intel.com, andy.pei@intel.com, david.lomartire@intel.com, qi.z.zhang@intel.com, xiaolong.ye@intel.com Date: Thu, 8 Aug 2019 16:46:02 +0800 Message-Id: <1565253974-183591-2-git-send-email-rosen.xu@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1565253974-183591-1-git-send-email-rosen.xu@intel.com> References: <1564556752-19257-2-git-send-email-rosen.xu@intel.com> <1565253974-183591-1-git-send-email-rosen.xu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 01/13] net/i40e: i40e support ipn3ke FPGA port bonding X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In ipn3ke, each FPGA network side port bonding to an i40e pf, each i40e pf link status should get data from FPGA network, side port. This patch provide bonding relationship. Signed-off-by: Rosen Xu --- drivers/net/i40e/base/i40e_type.h | 3 +++ drivers/net/i40e/i40e_ethdev.c | 34 ++++++++++++++++++++++++++++++++-- drivers/net/i40e/rte_pmd_i40e.h | 4 ++++ 3 files changed, 39 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 112866b..a4d46d8 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -660,6 +660,9 @@ struct i40e_hw { struct i40e_nvm_info nvm; struct i40e_fc_info fc; + //switch device + struct rte_eth_dev *switch_dev; + /* pci info */ u16 device_id; u16 vendor_id; diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 4e40b7a..e981256 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1312,6 +1312,9 @@ static inline void i40e_config_automask(struct i40e_pf *pf) hw->adapter_stopped = 0; hw->adapter_closed = 0; + //Update switch device pointer + hw->switch_dev = NULL; + /* * Switch Tag value should not be identical to either the First Tag * or Second Tag values. So set something other than common Ethertype @@ -2782,6 +2785,20 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) } } +void +i40e_set_switch_dev(struct rte_eth_dev *i40e_dev, +struct rte_eth_dev *switch_dev) +{ + struct i40e_hw *hw; + + if (!i40e_dev) + return; + + hw = I40E_DEV_PRIVATE_TO_HW(i40e_dev->data->dev_private); + + hw->switch_dev = switch_dev; +} + int i40e_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) @@ -2790,6 +2807,7 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) struct rte_eth_link link; bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false; int ret; + struct rte_eth_dev *switch_ethdev; memset(&link, 0, sizeof(link)); @@ -2803,6 +2821,18 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) else update_link_aq(hw, &link, enable_lse, wait_to_complete); + switch_ethdev = hw->switch_dev; + if (switch_ethdev) { + rte_eth_linkstatus_get(switch_ethdev, &link); + printf(">>>>>>>>>>>>>i40e_update_link 5 link.link_status %d\n", + link.link_status); + } else { + link.link_duplex = ETH_LINK_FULL_DUPLEX; + link.link_autoneg = ETH_LINK_SPEED_FIXED; + link.link_speed = ETH_SPEED_NUM_25G; + link.link_status = 0; + } + ret = rte_eth_linkstatus_set(dev, &link); i40e_notify_all_vfs_link_status(dev); @@ -12541,7 +12571,7 @@ struct i40e_customized_pctype* * b. Old_filter = 10 (Stag_Inner_Vlan) * c. New_filter = 0x10 * d. TR bit = 0xff (optional, not used here) - * e. Buffer – 2 entries: + * e. Buffer - 2 entries: * i. Byte 0 = 8 (outer vlan FV index). * Byte 1 = 0 (rsv) * Byte 2-3 = 0x0fff @@ -12555,7 +12585,7 @@ struct i40e_customized_pctype* * a. Valid_flags.replace_cloud = 1 * b. Old_filter = 1 (instead of outer IP) * c. New_filter = 0x10 - * d. Buffer – 2 entries: + * d. Buffer - 2 entries: * i. Byte 0 = 0x80 | 7 (valid | Stag). * Byte 1-3 = 0 (rsv) * ii. Byte 8 = 0x80 | 0x10 (valid | new l1 filter step1) diff --git a/drivers/net/i40e/rte_pmd_i40e.h b/drivers/net/i40e/rte_pmd_i40e.h index faac9e2..9d77c85 100644 --- a/drivers/net/i40e/rte_pmd_i40e.h +++ b/drivers/net/i40e/rte_pmd_i40e.h @@ -1061,4 +1061,8 @@ int rte_pmd_i40e_inset_set(uint16_t port, uint8_t pctype, return 0; } +void +i40e_set_switch_dev(struct rte_eth_dev *i40e_dev, +struct rte_eth_dev *switch_dev); + #endif /* _PMD_I40E_H_ */ -- 1.8.3.1