From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A7023A2E1B for ; Thu, 5 Sep 2019 05:13:17 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9ACCC1EAFE; Thu, 5 Sep 2019 05:12:36 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id E58B51EA76 for ; Thu, 5 Sep 2019 05:12:33 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Sep 2019 20:12:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="334419187" Received: from dpdk-dipei.sh.intel.com ([10.67.110.224]) by orsmga004.jf.intel.com with ESMTP; 04 Sep 2019 20:12:31 -0700 From: Andy Pei To: dev@dpdk.org Cc: rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com, xiaolong.ye@intel.com, qi.z.zhang@intel.com, david.lomartire@intel.com, ferruh.yigit@intel.com Date: Thu, 5 Sep 2019 10:59:35 +0800 Message-Id: <1567652381-124289-7-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1567652381-124289-1-git-send-email-andy.pei@intel.com> References: <1565253974-183591-14-git-send-email-rosen.xu@intel.com> <1567652381-124289-1-git-send-email-andy.pei@intel.com> Subject: [dpdk-dev] [PATCH v4 06/12] raw/ifpga/base: align the send buffer for SPI X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The length of send buffer of SPI bus should be 4bytes align. Signed-off-by: Tianfei Zhang Signed-off-by: Andy Pei --- drivers/raw/ifpga/base/opae_spi_transaction.c | 40 ++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c b/drivers/raw/ifpga/base/opae_spi_transaction.c index 17ec3c1..06ca625 100644 --- a/drivers/raw/ifpga/base/opae_spi_transaction.c +++ b/drivers/raw/ifpga/base/opae_spi_transaction.c @@ -109,6 +109,34 @@ static int resp_find_sop_eop(unsigned char *resp, unsigned int len, return ret; } +static void phy_tx_pad(unsigned char *phy_buf, unsigned int phy_buf_len, + unsigned int *aligned_len) +{ + unsigned char *p = &phy_buf[phy_buf_len - 1], *dst_p; + + *aligned_len = IFPGA_ALIGN(phy_buf_len, 4); + + if (*aligned_len == phy_buf_len) + return; + + dst_p = &phy_buf[*aligned_len - 1]; + + /* move EOP and bytes after EOP to the end of aligned size */ + while (p > phy_buf) { + *dst_p = *p; + + if (*p == SPI_PACKET_EOP) + break; + + p--; + dst_p--; + } + + /* fill the hole with PHY_IDLE */ + while (p < dst_p) + *p++ = SPI_BYTE_IDLE; +} + static int byte_to_core_convert(struct spi_transaction_dev *dev, unsigned int send_len, unsigned char *send_data, unsigned int resp_len, unsigned char *resp_data, @@ -149,15 +177,19 @@ static int byte_to_core_convert(struct spi_transaction_dev *dev, } } - print_buffer("before spi:", send_packet, p-send_packet); + tx_len = p - send_packet; + + print_buffer("before spi:", send_packet, tx_len); - reorder_phy_data(32, send_packet, p - send_packet); + phy_tx_pad(send_packet, tx_len, &tx_len); + print_buffer("after pad:", send_packet, tx_len); - print_buffer("after order to spi:", send_packet, p-send_packet); + reorder_phy_data(32, send_packet, tx_len); + + print_buffer("after order to spi:", send_packet, tx_len); /* call spi */ tx_buffer = send_packet; - tx_len = p - send_packet; rx_buffer = resp_packet; rx_len = resp_max_len; spi_flags = SPI_NOT_FOUND; -- 1.8.3.1