From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F356A2EFC for ; Tue, 15 Oct 2019 17:10:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B315C1ECF9; Tue, 15 Oct 2019 17:10:16 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id D50D61ECE1 for ; Tue, 15 Oct 2019 17:10:06 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Oct 2019 08:10:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,300,1566889200"; d="scan'208";a="199752177" Received: from npg-dpdk-cvl-simeisu-118d193.sh.intel.com ([10.67.110.183]) by orsmga006.jf.intel.com with ESMTP; 15 Oct 2019 08:10:05 -0700 From: Simei Su To: qi.z.zhang@intel.com, xiaolong.ye@intel.com, ferruh.yigit@intel.com Cc: dev@dpdk.org, simei.su@intel.com Date: Tue, 15 Oct 2019 23:09:48 +0800 Message-Id: <1571152189-375224-3-git-send-email-simei.su@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1571152189-375224-1-git-send-email-simei.su@intel.com> References: <1571144219-208697-1-git-send-email-simei.su@intel.com> <1571152189-375224-1-git-send-email-simei.su@intel.com> Subject: [dpdk-dev] [PATCH v14 2/3] ethdev: extend RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch reserves several bits as input set selection from the high end of the 64 bits. It is combined with exisiting ETH_RSS_* to represent RSS types. This patch also checks the simultaneous use of SRC_ONLY and DST_ONLY of the same level. Signed-off-by: Simei Su Reviewed-by: Qi Zhang Acked-by: Ori Kam Reviewed-by: Andrew Rybchenko --- lib/librte_ethdev/rte_ethdev.c | 5 +++++ lib/librte_ethdev/rte_ethdev.h | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 7caaa0b..3f989df 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -1269,6 +1269,9 @@ struct rte_eth_dev * goto rollback; } + dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf = + rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf); + /* Check that device supports requested rss hash functions. */ if ((dev_info.flow_type_rss_offloads | dev_conf->rx_adv_conf.rss_conf.rss_hf) != @@ -3112,6 +3115,8 @@ struct rte_eth_dev * if (ret != 0) return ret; + rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf); + dev = &rte_eth_devices[port_id]; if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) != dev_info.flow_type_rss_offloads) { diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index 40aa6a3..6b148be 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -507,6 +507,42 @@ struct rte_eth_rss_conf { #define ETH_RSS_NVGRE (1ULL << 21) #define ETH_RSS_GTPU (1ULL << 23) +/* + * We use the following macros to combine with above ETH_RSS_* for + * more specific input set selection. These bits are defined starting + * from the high end of the 64 bits. + * Note: If we use above ETH_RSS_* without SRC/DST_ONLY, it represents + * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of + * the same level are used simultaneously, it is the same case as none of + * them are added. + */ +#define ETH_RSS_L3_SRC_ONLY (1ULL << 63) +#define ETH_RSS_L3_DST_ONLY (1ULL << 62) +#define ETH_RSS_L4_SRC_ONLY (1ULL << 61) +#define ETH_RSS_L4_DST_ONLY (1ULL << 60) + +/** + * For input set change of hash filter, if SRC_ONLY and DST_ONLY of + * the same level are used simultaneously, it is the same case as + * none of them are added. + * + * @param rss_hf + * RSS types with SRC/DST_ONLY. + * @return + * RSS types. + */ +static inline uint64_t +rte_eth_rss_hf_refine(uint64_t rss_hf) +{ + if ((rss_hf & ETH_RSS_L3_SRC_ONLY) && (rss_hf & ETH_RSS_L3_DST_ONLY)) + rss_hf &= ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY); + + if ((rss_hf & ETH_RSS_L4_SRC_ONLY) && (rss_hf & ETH_RSS_L4_DST_ONLY)) + rss_hf &= ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY); + + return rss_hf; +} + #define ETH_RSS_IP ( \ ETH_RSS_IPV4 | \ ETH_RSS_FRAG_IPV4 | \ -- 1.8.3.1