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From: Gavin Hu <gavin.hu@arm.com>
To: dev@dpdk.org
Cc: nd@arm.com, david.marchand@redhat.com,
	maxime.coquelin@redhat.com, tiwei.bie@intel.com,
	thomas@monjalon.net, rasland@mellanox.com, matan@mellanox.com,
	shahafs@mellanox.com, viacheslavo@mellanox.com,
	arybchenko@solarflare.com, stephen@networkplumber.org,
	hemant.agrawal@nxp.com, jerinj@marvell.com,
	pbhagavatula@marvell.com, Honnappa.Nagarahalli@arm.com,
	ruifeng.wang@arm.com, phil.yang@arm.com, joyce.kong@arm.com,
	steve.capper@arm.com
Subject: [dpdk-dev] [PATCH v1 1/3] eal/arm64: relax the io barrier for aarch64
Date: Tue, 22 Oct 2019 23:27:52 +0800	[thread overview]
Message-ID: <1571758074-16445-2-git-send-email-gavin.hu@arm.com> (raw)
In-Reply-To: <1571758074-16445-1-git-send-email-gavin.hu@arm.com>

Armv8's peripheral coherence order is a total order on all reads and writes
to that peripheral.[1]

The Peripheral coherence order for a Memory-mapped peripheral signifies the
order in which accesses arrive at the endpoint.  For a read or a write RW1
and a read or a write RW2 to the same peripheral, then RW1 will appear in
the Peripheral coherence order for the peripheral before RW2 if either of
the following cases apply:
 1. RW1 and RW2 are accesses using Non-cacheable or Device attributes and
    RW1 is Ordered-before RW2.
 2. RW1 and RW2 are accesses using Device-nGnRE or Device-nGnRnE attributes
    and RW1 appears in program order before RW2.

On arm platforms, all the PCI resources are mapped to nGnRE device memory
[2], the above case 2 holds true, that means the perepheral coherence order
applies here and just a compiler barrier is sufficient for rte io barriers.

[1] Section B2.3.4 of ARMARM, https://developer.arm.com/docs/ddi0487/lates
t/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
tree/drivers/pci/pci-sysfs.c?h=v5.4-rc3#n1204

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index 859ae12..fd63956 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -34,11 +34,11 @@ extern "C" {
 
 #define rte_smp_rmb() dmb(ishld)
 
-#define rte_io_mb() rte_mb()
+#define rte_io_mb() rte_compiler_barrier()
 
-#define rte_io_wmb() rte_wmb()
+#define rte_io_wmb() rte_compiler_barrier()
 
-#define rte_io_rmb() rte_rmb()
+#define rte_io_rmb() rte_compiler_barrier()
 
 #define rte_cio_wmb() dmb(oshst)
 
-- 
2.7.4


  reply	other threads:[~2019-10-22 15:28 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-22 15:27 [dpdk-dev] [PATCH v1 0/3] relax io barrier for aarch64 and use smp barriers for virtual pci memory Gavin Hu
2019-10-22 15:27 ` Gavin Hu [this message]
2019-10-22 15:27 ` [dpdk-dev] [PATCH v1 2/3] net/virtio: virtual PCI requires smp barriers Gavin Hu
2019-10-22 15:27 ` [dpdk-dev] [PATCH v1 3/3] crypto/virtio: " Gavin Hu
2019-10-23  8:22 ` [dpdk-dev] [PATCH v1 0/3] relax io barrier for aarch64 and use smp barriers for virtual pci memory Maxime Coquelin
2019-11-07  1:13   ` Gavin Hu (Arm Technology China)
2019-12-20  3:09 ` [dpdk-dev] [PATCH v2 " Gavin Hu
2019-12-20  3:09 ` [dpdk-dev] [PATCH v2 1/3] eal/arm64: relax the io barrier for aarch64 Gavin Hu
2019-12-20  3:33   ` Jerin Jacob
2019-12-20  3:38     ` Jerin Jacob
2019-12-20  4:19       ` Gavin Hu
2019-12-20  4:34         ` Jerin Jacob
2019-12-20  6:32           ` Gavin Hu
2019-12-20  6:55             ` Jerin Jacob
2019-12-23  9:14               ` Gavin Hu
2019-12-23  9:19                 ` Jerin Jacob
2019-12-23 10:16                   ` Gavin Hu
2020-01-02  9:51                     ` Jerin Jacob
2020-01-03  6:30                       ` Gavin Hu
2020-01-03  7:34                         ` Jerin Jacob
2020-01-03  9:12                           ` Gavin Hu
2019-12-20  3:09 ` [dpdk-dev] [PATCH v2 2/3] net/virtio: virtual PCI requires smp barriers Gavin Hu
2019-12-20  8:17   ` Tiwei Bie
2019-12-20 10:19     ` Gavin Hu
2019-12-20  3:09 ` [dpdk-dev] [PATCH v2 3/3] crypto/virtio: " Gavin Hu
2020-02-08 13:48 ` [dpdk-dev] [PATCH v3] net/i40e: relaxed barrier in the tx fastpath Gavin Hu
2020-02-11  2:11   ` Ye Xiaolong
2020-02-12  6:02     ` Gavin Hu
2020-02-15  8:25   ` Jerin Jacob
2020-02-12  5:56 ` [dpdk-dev] [PATCH v4] " Gavin Hu
2020-02-15 15:16   ` Ye Xiaolong
2020-02-16  9:51     ` Thomas Monjalon
2020-02-16 16:38       ` Ye Xiaolong
2020-02-16 17:36         ` Thomas Monjalon

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