[dpdk-dev] [PATCH] doc: update hairpin data buffer size config

[Bing Zhao <bingz@mellanox.com>]

This patch updates the MLX5 PMD and release notes documentations.
Adding the guideline for hairpin data buffer size configuration.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
---
 doc/guides/nics/mlx5.rst               | 11 +++++++++++
 doc/guides/rel_notes/release_20_05.rst |  1 +
 2 files changed, 12 insertions(+)

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index e13c07d..c3cde30 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -99,6 +99,7 @@ Features
 - Support for multiple rte_flow groups.
 - Per packet no-inline hint flag to disable packet data copying into Tx descriptors.
 - Hardware LRO.
+- Hairpin.
 
 Limitations
 -----------
@@ -773,6 +774,16 @@ Run-time configuration
   If this parameter is not specified, by default PMD will set
   the smallest value supported by HW.
 
+- ``hp_buf_log_sz`` parameter [int]
+
+  The total data buffer size of a hairpin queue (logarithmic form), in bytes.
+  PMD will set the data buffer size to 2 ** ``hp_buf_log_sz``, both for RX & TX.
+  The capacity of the value is sepcified by the Firmware, and the initialization
+  will get a failure if it is out of scope.
+  A larger value is needed to support larger frame.
+  If this parameter is not specified, by default PMD will set it to 16 and 9KB
+  jumbo frames are supported.
+
 .. _mlx5_firmware_config:
 
 Firmware configuration
diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index 2596269..7128f26 100644
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -62,6 +62,7 @@ New Features
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
   * Added support for creating Relaxed Ordering Memory Regions.
+  * Added support for configuring Haripin queue data buffer size.
 
 * **Updated the Intel ice driver.**
 
-- 
2.5.5