From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB0A6A00BE; Mon, 27 Apr 2020 20:20:19 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CCE2C1D509; Mon, 27 Apr 2020 20:20:17 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 4B0D21D502 for ; Mon, 27 Apr 2020 20:20:15 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from akozyrev@mellanox.com) with ESMTPS (AES256-SHA encrypted); 27 Apr 2020 21:20:13 +0300 Received: from pegasus02.mtr.labs.mlnx. (pegasus02.mtr.labs.mlnx [10.210.16.122]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 03RIKDmH019886; Mon, 27 Apr 2020 21:20:13 +0300 From: Alexander Kozyrev To: dev@dpdk.org Cc: stable@dpdk.org, rasland@mellanox.com, viacheslavo@mellanox.com Date: Mon, 27 Apr 2020 18:20:11 +0000 Message-Id: <1588011611-16935-1-git-send-email-akozyrev@mellanox.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/mlx5: fix assert in dynamic metadata handling X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The assert in dynamic flow metadata handling is wrong after the fix for the performance degradation. The assert meant to check the metadata mask but was updated with the metadata offset instead. Fix this assert and restore proper metadata mask checking. Fixes: 6c55b62 ("net/mlx5: set dynamic flow metadata in Rx queues") Cc: stable@dpdk.org Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 7 ++++--- drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 5 +++-- drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 3 ++- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h index 45ff8e6..89861dd 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h @@ -264,14 +264,15 @@ elts[pos + 2]->hash.fdir.hi = flow_tag; elts[pos + 3]->hash.fdir.hi = flow_tag; } - if (!!rxq->flow_meta_mask) { + if (rxq->dynf_meta) { int32_t offs = rxq->flow_meta_offset; const uint32_t meta = *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *); /* Check if title packet has valid metadata. */ if (meta) { - MLX5_ASSERT(t_pkt->ol_flags & offs); + MLX5_ASSERT(t_pkt->ol_flags & + rxq->flow_meta_mask); *RTE_MBUF_DYNFIELD(elts[pos], offs, uint32_t *) = meta; *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, @@ -1028,7 +1029,7 @@ pkts[pos + 3]->timestamp = rte_be_to_cpu_64(cq[pos + p3].timestamp); } - if (!!rxq->flow_meta_mask) { + if (rxq->dynf_meta) { uint64_t flag = rxq->flow_meta_mask; int32_t offs = rxq->flow_meta_offset; uint32_t metadata; diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h index d39e726..ecafbf8 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h @@ -205,14 +205,15 @@ elts[pos + 2]->hash.fdir.hi = flow_tag; elts[pos + 3]->hash.fdir.hi = flow_tag; } - if (!!rxq->flow_meta_mask) { + if (rxq->dynf_meta) { int32_t offs = rxq->flow_meta_offset; const uint32_t meta = *RTE_MBUF_DYNFIELD(t_pkt, offs, uint32_t *); /* Check if title packet has valid metadata. */ if (meta) { - MLX5_ASSERT(t_pkt->ol_flags & offs); + MLX5_ASSERT(t_pkt->ol_flags & + rxq->flow_meta_mask); *RTE_MBUF_DYNFIELD(elts[pos], offs, uint32_t *) = meta; *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h index f110f73..6847ae7 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h @@ -199,7 +199,8 @@ /* Check if title packet has valid metadata. */ if (meta) { - MLX5_ASSERT(t_pkt->ol_flags & offs); + MLX5_ASSERT(t_pkt->ol_flags & + rxq->flow_meta_mask); *RTE_MBUF_DYNFIELD(elts[pos], offs, uint32_t *) = meta; *RTE_MBUF_DYNFIELD(elts[pos + 1], offs, -- 1.8.3.1