From: Ankur Dwivedi <adwivedi@marvell.com>
To: <dev@dpdk.org>
Cc: <akhil.goyal@nxp.com>, <jerinj@marvell.com>,
<ndabilpuram@marvell.com>, <anoobj@marvell.com>,
<ktejasree@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>
Subject: [dpdk-dev] [PATCH 1/2] common/octeontx2: sync cpt mailbox
Date: Fri, 31 Jul 2020 19:21:52 +0530 [thread overview]
Message-ID: <1596203513-21124-1-git-send-email-adwivedi@marvell.com> (raw)
From: Tejasree Kondoj <ktejasree@marvell.com>
This patch syncs the pmd mailbox with the cpt pf driver.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/common/octeontx2/otx2_mbox.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h
index 34b1d06..51e657a 100644
--- a/drivers/common/octeontx2/otx2_mbox.h
+++ b/drivers/common/octeontx2/otx2_mbox.h
@@ -1224,6 +1224,8 @@ struct cpt_rd_wr_reg_msg {
uint64_t __otx2_io *ret_val;
uint64_t __otx2_io val;
uint8_t __otx2_io is_write;
+ /* BLKADDR_CPT0/BLKADDR_CPT1 or 0 for BLKADDR_CPT0 */
+ uint8_t __otx2_io blkaddr;
};
struct cpt_set_crypto_grp_req_msg {
@@ -1235,11 +1237,14 @@ struct cpt_lf_alloc_req_msg {
struct mbox_msghdr hdr;
uint16_t __otx2_io nix_pf_func;
uint16_t __otx2_io sso_pf_func;
+ uint16_t __otx2_io eng_grpmask;
+ /* BLKADDR_CPT0/BLKADDR_CPT1 or 0 for BLKADDR_CPT0 */
+ uint8_t __otx2_io blkaddr;
};
struct cpt_lf_alloc_rsp_msg {
struct mbox_msghdr hdr;
- uint8_t __otx2_io crypto_eng_grp;
+ uint16_t __otx2_io eng_grpmsk;
};
#define CPT_INLINE_INBOUND 0
--
1.9.3
next reply other threads:[~2020-07-31 13:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-31 13:51 Ankur Dwivedi [this message]
2020-07-31 13:51 ` [dpdk-dev] [PATCH 2/2] crypto/octeontx2: add cpt kernel driver version check Ankur Dwivedi
2020-10-07 6:44 ` [dpdk-dev] [PATCH 1/2] common/octeontx2: sync cpt mailbox Anoob Joseph
2020-10-08 21:16 ` Akhil Goyal
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