From: Nicolas Chautru <nicolas.chautru@intel.com> To: dev@dpdk.org, akhil.goyal@nxp.com Cc: bruce.richardson@intel.com, Nicolas Chautru <nicolas.chautru@intel.com> Subject: [dpdk-dev] [PATCH v3 03/11] baseband/acc100: add info get function Date: Tue, 18 Aug 2020 17:25:23 -0700 Message-ID: <1597796731-57841-4-git-send-email-nicolas.chautru@intel.com> (raw) In-Reply-To: <1597796731-57841-1-git-send-email-nicolas.chautru@intel.com> Add in the "info_get" function to the driver, to allow us to query the device. No processing capability are available yet. Linking bbdev-test to support the PMD with null capability. Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> --- app/test-bbdev/Makefile | 3 + app/test-bbdev/meson.build | 3 + drivers/baseband/acc100/rte_acc100_cfg.h | 96 +++++++++++++ drivers/baseband/acc100/rte_acc100_pmd.c | 225 +++++++++++++++++++++++++++++++ drivers/baseband/acc100/rte_acc100_pmd.h | 3 + 5 files changed, 330 insertions(+) create mode 100644 drivers/baseband/acc100/rte_acc100_cfg.h diff --git a/app/test-bbdev/Makefile b/app/test-bbdev/Makefile index dc29557..dbc3437 100644 --- a/app/test-bbdev/Makefile +++ b/app/test-bbdev/Makefile @@ -26,5 +26,8 @@ endif ifeq ($(CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC),y) LDLIBS += -lrte_pmd_bbdev_fpga_5gnr_fec endif +ifeq ($(CONFIG_RTE_LIBRTE_PMD_BBDEV_ACC100),y) +LDLIBS += -lrte_pmd_bbdev_acc100 +endif include $(RTE_SDK)/mk/rte.app.mk diff --git a/app/test-bbdev/meson.build b/app/test-bbdev/meson.build index 18ab6a8..fbd8ae3 100644 --- a/app/test-bbdev/meson.build +++ b/app/test-bbdev/meson.build @@ -12,3 +12,6 @@ endif if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC') deps += ['pmd_bbdev_fpga_5gnr_fec'] endif +if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_ACC100') + deps += ['pmd_bbdev_acc100'] +endif \ No newline at end of file diff --git a/drivers/baseband/acc100/rte_acc100_cfg.h b/drivers/baseband/acc100/rte_acc100_cfg.h new file mode 100644 index 0000000..73bbe36 --- /dev/null +++ b/drivers/baseband/acc100/rte_acc100_cfg.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Intel Corporation + */ + +#ifndef _RTE_ACC100_CFG_H_ +#define _RTE_ACC100_CFG_H_ + +/** + * @file rte_acc100_cfg.h + * + * Functions for configuring ACC100 HW, exposed directly to applications. + * Configuration related to encoding/decoding is done through the + * librte_bbdev library. + * + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + */ + +#include <stdint.h> +#include <stdbool.h> + +#ifdef __cplusplus +extern "C" { +#endif +/**< Number of Virtual Functions ACC100 supports */ +#define RTE_ACC100_NUM_VFS 16 + +/** + * Definition of Queue Topology for ACC100 Configuration + * Some level of details is abstracted out to expose a clean interface + * given that comprehensive flexibility is not required + */ +struct rte_q_topology_t { + /** Number of QGroups in incremental order of priority */ + uint16_t num_qgroups; + /** + * All QGroups have the same number of AQs here. + * Note : Could be made a 16-array if more flexibility is really + * required + */ + uint16_t num_aqs_per_groups; + /** + * Depth of the AQs is the same of all QGroups here. Log2 Enum : 2^N + * Note : Could be made a 16-array if more flexibility is really + * required + */ + uint16_t aq_depth_log2; + /** + * Index of the first Queue Group Index - assuming contiguity + * Initialized as -1 + */ + int8_t first_qgroup_index; +}; + +/** + * Definition of Arbitration related parameters for ACC100 Configuration + */ +struct rte_arbitration_t { + /** Default Weight for VF Fairness Arbitration */ + uint16_t round_robin_weight; + uint32_t gbr_threshold1; /**< Guaranteed Bitrate Threshold 1 */ + uint32_t gbr_threshold2; /**< Guaranteed Bitrate Threshold 2 */ +}; + +/** + * Structure to pass ACC100 configuration. + * Note: all VF Bundles will have the same configuration. + */ +struct acc100_conf { + bool pf_mode_en; /**< 1 if PF is used for dataplane, 0 for VFs */ + /** 1 if input '1' bit is represented by a positive LLR value, 0 if '1' + * bit is represented by a negative value. + */ + bool input_pos_llr_1_bit; + /** 1 if output '1' bit is represented by a positive value, 0 if '1' + * bit is represented by a negative value. + */ + bool output_pos_llr_1_bit; + uint16_t num_vf_bundles; /**< Number of VF bundles to setup */ + /** Queue topology for each operation type */ + struct rte_q_topology_t q_ul_4g; + struct rte_q_topology_t q_dl_4g; + struct rte_q_topology_t q_ul_5g; + struct rte_q_topology_t q_dl_5g; + /** Arbitration configuration for each operation type */ + struct rte_arbitration_t arb_ul_4g[RTE_ACC100_NUM_VFS]; + struct rte_arbitration_t arb_dl_4g[RTE_ACC100_NUM_VFS]; + struct rte_arbitration_t arb_ul_5g[RTE_ACC100_NUM_VFS]; + struct rte_arbitration_t arb_dl_5g[RTE_ACC100_NUM_VFS]; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_ACC100_CFG_H_ */ diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 1b4cd13..7807a30 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -26,6 +26,184 @@ RTE_LOG_REGISTER(acc100_logtype, pmd.bb.acc100, NOTICE); #endif +/* Read a register of a ACC100 device */ +static inline uint32_t +acc100_reg_read(struct acc100_device *d, uint32_t offset) +{ + + void *reg_addr = RTE_PTR_ADD(d->mmio_base, offset); + uint32_t ret = *((volatile uint32_t *)(reg_addr)); + return rte_le_to_cpu_32(ret); +} + +/* Calculate the offset of the enqueue register */ +static inline uint32_t +queue_offset(bool pf_device, uint8_t vf_id, uint8_t qgrp_id, uint16_t aq_id) +{ + if (pf_device) + return ((vf_id << 12) + (qgrp_id << 7) + (aq_id << 3) + + HWPfQmgrIngressAq); + else + return ((qgrp_id << 7) + (aq_id << 3) + + HWVfQmgrIngressAq); +} + +enum {UL_4G = 0, UL_5G, DL_4G, DL_5G, NUM_ACC}; + +/* Return the queue topology for a Queue Group Index */ +static inline void +qtopFromAcc(struct rte_q_topology_t **qtop, int acc_enum, + struct acc100_conf *acc100_conf) +{ + struct rte_q_topology_t *p_qtop; + p_qtop = NULL; + switch (acc_enum) { + case UL_4G: + p_qtop = &(acc100_conf->q_ul_4g); + break; + case UL_5G: + p_qtop = &(acc100_conf->q_ul_5g); + break; + case DL_4G: + p_qtop = &(acc100_conf->q_dl_4g); + break; + case DL_5G: + p_qtop = &(acc100_conf->q_dl_5g); + break; + default: + /* NOTREACHED */ + rte_bbdev_log(ERR, "Unexpected error evaluating qtopFromAcc"); + break; + } + *qtop = p_qtop; +} + +static void +initQTop(struct acc100_conf *acc100_conf) +{ + acc100_conf->q_ul_4g.num_aqs_per_groups = 0; + acc100_conf->q_ul_4g.num_qgroups = 0; + acc100_conf->q_ul_4g.first_qgroup_index = -1; + acc100_conf->q_ul_5g.num_aqs_per_groups = 0; + acc100_conf->q_ul_5g.num_qgroups = 0; + acc100_conf->q_ul_5g.first_qgroup_index = -1; + acc100_conf->q_dl_4g.num_aqs_per_groups = 0; + acc100_conf->q_dl_4g.num_qgroups = 0; + acc100_conf->q_dl_4g.first_qgroup_index = -1; + acc100_conf->q_dl_5g.num_aqs_per_groups = 0; + acc100_conf->q_dl_5g.num_qgroups = 0; + acc100_conf->q_dl_5g.first_qgroup_index = -1; +} + +static inline void +updateQtop(uint8_t acc, uint8_t qg, struct acc100_conf *acc100_conf, + struct acc100_device *d) { + uint32_t reg; + struct rte_q_topology_t *q_top = NULL; + qtopFromAcc(&q_top, acc, acc100_conf); + if (unlikely(q_top == NULL)) + return; + uint16_t aq; + q_top->num_qgroups++; + if (q_top->first_qgroup_index == -1) { + q_top->first_qgroup_index = qg; + /* Can be optimized to assume all are enabled by default */ + reg = acc100_reg_read(d, queue_offset(d->pf_device, + 0, qg, ACC100_NUM_AQS - 1)); + if (reg & QUEUE_ENABLE) { + q_top->num_aqs_per_groups = ACC100_NUM_AQS; + return; + } + q_top->num_aqs_per_groups = 0; + for (aq = 0; aq < ACC100_NUM_AQS; aq++) { + reg = acc100_reg_read(d, queue_offset(d->pf_device, + 0, qg, aq)); + if (reg & QUEUE_ENABLE) + q_top->num_aqs_per_groups++; + } + } +} + +/* Fetch configuration enabled for the PF/VF using MMIO Read (slow) */ +static inline void +fetch_acc100_config(struct rte_bbdev *dev) +{ + struct acc100_device *d = dev->data->dev_private; + struct acc100_conf *acc100_conf = &d->acc100_conf; + const struct acc100_registry_addr *reg_addr; + uint8_t acc, qg; + uint32_t reg, reg_aq, reg_len0, reg_len1; + uint32_t reg_mode; + + /* No need to retrieve the configuration is already done */ + if (d->configured) + return; + + /* Choose correct registry addresses for the device type */ + if (d->pf_device) + reg_addr = &pf_reg_addr; + else + reg_addr = &vf_reg_addr; + + d->ddr_size = (1 + acc100_reg_read(d, reg_addr->ddr_range)) << 10; + + /* Single VF Bundle by VF */ + acc100_conf->num_vf_bundles = 1; + initQTop(acc100_conf); + + struct rte_q_topology_t *q_top = NULL; + int qman_func_id[5] = {0, 2, 1, 3, 4}; + reg = acc100_reg_read(d, reg_addr->qman_group_func); + for (qg = 0; qg < ACC100_NUM_QGRPS_PER_WORD; qg++) { + reg_aq = acc100_reg_read(d, + queue_offset(d->pf_device, 0, qg, 0)); + if (reg_aq & QUEUE_ENABLE) { + acc = qman_func_id[(reg >> (qg * 4)) & 0x7]; + updateQtop(acc, qg, acc100_conf, d); + } + } + + /* Check the depth of the AQs*/ + reg_len0 = acc100_reg_read(d, reg_addr->depth_log0_offset); + reg_len1 = acc100_reg_read(d, reg_addr->depth_log1_offset); + for (acc = 0; acc < NUM_ACC; acc++) { + qtopFromAcc(&q_top, acc, acc100_conf); + if (q_top->first_qgroup_index < ACC100_NUM_QGRPS_PER_WORD) + q_top->aq_depth_log2 = (reg_len0 >> + (q_top->first_qgroup_index * 4)) + & 0xF; + else + q_top->aq_depth_log2 = (reg_len1 >> + ((q_top->first_qgroup_index - + ACC100_NUM_QGRPS_PER_WORD) * 4)) + & 0xF; + } + + /* Read PF mode */ + if (d->pf_device) { + reg_mode = acc100_reg_read(d, HWPfHiPfMode); + acc100_conf->pf_mode_en = (reg_mode == 2) ? 1 : 0; + } + + rte_bbdev_log_debug( + "%s Config LLR SIGN IN/OUT %s %s QG %u %u %u %u AQ %u %u %u %u Len %u %u %u %u\n", + (d->pf_device) ? "PF" : "VF", + (acc100_conf->input_pos_llr_1_bit) ? "POS" : "NEG", + (acc100_conf->output_pos_llr_1_bit) ? "POS" : "NEG", + acc100_conf->q_ul_4g.num_qgroups, + acc100_conf->q_dl_4g.num_qgroups, + acc100_conf->q_ul_5g.num_qgroups, + acc100_conf->q_dl_5g.num_qgroups, + acc100_conf->q_ul_4g.num_aqs_per_groups, + acc100_conf->q_dl_4g.num_aqs_per_groups, + acc100_conf->q_ul_5g.num_aqs_per_groups, + acc100_conf->q_dl_5g.num_aqs_per_groups, + acc100_conf->q_ul_4g.aq_depth_log2, + acc100_conf->q_dl_4g.aq_depth_log2, + acc100_conf->q_ul_5g.aq_depth_log2, + acc100_conf->q_dl_5g.aq_depth_log2); +} + /* Free 64MB memory used for software rings */ static int acc100_dev_close(struct rte_bbdev *dev __rte_unused) @@ -33,8 +211,55 @@ return 0; } +/* Get ACC100 device info */ +static void +acc100_dev_info_get(struct rte_bbdev *dev, + struct rte_bbdev_driver_info *dev_info) +{ + struct acc100_device *d = dev->data->dev_private; + + static const struct rte_bbdev_op_cap bbdev_capabilities[] = { + RTE_BBDEV_END_OF_CAPABILITIES_LIST() + }; + + static struct rte_bbdev_queue_conf default_queue_conf; + default_queue_conf.socket = dev->data->socket_id; + default_queue_conf.queue_size = MAX_QUEUE_DEPTH; + + dev_info->driver_name = dev->device->driver->name; + + /* Read and save the populated config from ACC100 registers */ + fetch_acc100_config(dev); + + /* This isn't ideal because it reports the maximum number of queues but + * does not provide info on how many can be uplink/downlink or different + * priorities + */ + dev_info->max_num_queues = + d->acc100_conf.q_dl_5g.num_aqs_per_groups * + d->acc100_conf.q_dl_5g.num_qgroups + + d->acc100_conf.q_ul_5g.num_aqs_per_groups * + d->acc100_conf.q_ul_5g.num_qgroups + + d->acc100_conf.q_dl_4g.num_aqs_per_groups * + d->acc100_conf.q_dl_4g.num_qgroups + + d->acc100_conf.q_ul_4g.num_aqs_per_groups * + d->acc100_conf.q_ul_4g.num_qgroups; + dev_info->queue_size_lim = MAX_QUEUE_DEPTH; + dev_info->hardware_accelerated = true; + dev_info->max_dl_queue_priority = + d->acc100_conf.q_dl_4g.num_qgroups - 1; + dev_info->max_ul_queue_priority = + d->acc100_conf.q_ul_4g.num_qgroups - 1; + dev_info->default_queue_conf = default_queue_conf; + dev_info->cpu_flag_reqs = NULL; + dev_info->min_alignment = 64; + dev_info->capabilities = bbdev_capabilities; + dev_info->harq_buffer_size = d->ddr_size; +} + static const struct rte_bbdev_ops acc100_bbdev_ops = { .close = acc100_dev_close, + .info_get = acc100_dev_info_get, }; /* ACC100 PCI PF address map */ diff --git a/drivers/baseband/acc100/rte_acc100_pmd.h b/drivers/baseband/acc100/rte_acc100_pmd.h index cd77570..662e2c8 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.h +++ b/drivers/baseband/acc100/rte_acc100_pmd.h @@ -7,6 +7,7 @@ #include "acc100_pf_enum.h" #include "acc100_vf_enum.h" +#include "rte_acc100_cfg.h" /* Helper macro for logging */ #define rte_bbdev_log(level, fmt, ...) \ @@ -520,6 +521,8 @@ struct acc100_registry_addr { /* Private data structure for each ACC100 device */ struct acc100_device { void *mmio_base; /**< Base address of MMIO registers (BAR0) */ + uint32_t ddr_size; /* Size in kB */ + struct acc100_conf acc100_conf; /* ACC100 Initial configuration */ bool pf_device; /**< True if this is a PF ACC100 device */ bool configured; /**< True if this ACC100 device is configured */ }; -- 1.8.3.1
next prev parent reply other threads:[~2020-08-19 0:28 UTC|newest] Thread overview: 213+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-19 0:25 [dpdk-dev] [PATCH v3 00/11] bbdev PMD ACC100 Nicolas Chautru 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 01/11] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-08-29 9:44 ` Xu, Rosen 2020-09-04 16:44 ` Chautru, Nicolas 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 02/11] baseband/acc100: add register definition file Nicolas Chautru 2020-08-29 9:55 ` Xu, Rosen 2020-08-29 17:39 ` Chautru, Nicolas 2020-09-03 2:15 ` Xu, Rosen 2020-09-03 9:17 ` Ferruh Yigit 2020-08-19 0:25 ` Nicolas Chautru [this message] 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 04/11] baseband/acc100: add queue configuration Nicolas Chautru 2020-08-29 10:39 ` Xu, Rosen 2020-08-29 17:48 ` Chautru, Nicolas 2020-09-03 2:30 ` Xu, Rosen 2020-09-03 22:48 ` Chautru, Nicolas 2020-09-04 2:01 ` Xu, Rosen 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 05/11] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-08-20 14:38 ` Dave Burley 2020-08-20 14:52 ` Chautru, Nicolas 2020-08-20 14:57 ` Dave Burley 2020-08-20 21:05 ` Chautru, Nicolas 2020-09-03 8:06 ` Dave Burley 2020-08-29 11:10 ` Xu, Rosen 2020-08-29 18:01 ` Chautru, Nicolas 2020-09-03 2:34 ` Xu, Rosen 2020-09-03 9:09 ` Ananyev, Konstantin 2020-09-03 20:45 ` Chautru, Nicolas 2020-09-15 1:45 ` Chautru, Nicolas 2020-09-15 10:21 ` Ananyev, Konstantin 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 06/11] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 07/11] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 08/11] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 09/11] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 10/11] baseband/acc100: add configure function Nicolas Chautru 2020-09-03 10:06 ` Aidan Goddard 2020-09-03 18:53 ` Chautru, Nicolas 2020-08-19 0:25 ` [dpdk-dev] [PATCH v3 11/11] doc: update bbdev feature table Nicolas Chautru 2020-09-04 17:53 ` [dpdk-dev] [PATCH v4 00/11] bbdev PMD ACC100 Nicolas Chautru 2020-09-04 17:53 ` [dpdk-dev] [PATCH v4 01/11] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-08 3:10 ` Liu, Tianjiao 2020-09-04 17:53 ` [dpdk-dev] [PATCH v4 02/11] baseband/acc100: add register definition file Nicolas Chautru 2020-09-15 2:31 ` Xu, Rosen 2020-09-18 2:39 ` Liu, Tianjiao 2020-09-04 17:53 ` [dpdk-dev] [PATCH v4 03/11] baseband/acc100: add info get function Nicolas Chautru 2020-09-18 2:47 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 04/11] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-15 2:31 ` Xu, Rosen 2020-09-18 3:01 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 05/11] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-21 1:40 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 06/11] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-21 1:41 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 07/11] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-21 1:43 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 08/11] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-21 1:45 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 09/11] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-21 1:46 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 10/11] baseband/acc100: add configure function Nicolas Chautru 2020-09-21 1:48 ` Liu, Tianjiao 2020-09-04 17:54 ` [dpdk-dev] [PATCH v4 11/11] doc: update bbdev feature table Nicolas Chautru 2020-09-21 1:50 ` Liu, Tianjiao 2020-09-21 14:36 ` [dpdk-dev] [PATCH v4 00/11] bbdev PMD ACC100 Chautru, Nicolas 2020-09-22 19:32 ` Akhil Goyal 2020-09-23 2:21 ` Chautru, Nicolas 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 " Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 01/11] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 02/11] baseband/acc100: add register definition file Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 03/11] baseband/acc100: add info get function Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 04/11] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 05/11] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 06/11] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 07/11] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 08/11] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 09/11] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 10/11] baseband/acc100: add configure function Nicolas Chautru 2020-09-23 2:12 ` [dpdk-dev] [PATCH v5 11/11] doc: update bbdev feature table Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 00/11] bbdev PMD ACC100 Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 01/11] service: retrieve lcore active state Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 02/11] test/service: fix race condition on stopping lcore Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 03/11] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 04/11] baseband/acc100: add register definition file Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 05/11] baseband/acc100: add info get function Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 06/11] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 07/11] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 08/11] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 09/11] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 10/11] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-23 2:19 ` [dpdk-dev] [PATCH v6 11/11] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-23 2:24 ` [dpdk-dev] [PATCH v7 00/11] bbdev PMD ACC100 Nicolas Chautru 2020-09-23 2:24 ` [dpdk-dev] [PATCH v7 01/11] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-23 2:24 ` [dpdk-dev] [PATCH v7 02/11] baseband/acc100: add register definition file Nicolas Chautru 2020-09-23 2:24 ` [dpdk-dev] [PATCH v7 03/11] baseband/acc100: add info get function Nicolas Chautru 2020-09-23 2:24 ` [dpdk-dev] [PATCH v7 04/11] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 05/11] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 06/11] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 07/11] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 08/11] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 09/11] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 10/11] baseband/acc100: add configure function Nicolas Chautru 2020-09-23 2:25 ` [dpdk-dev] [PATCH v7 11/11] doc: update bbdev feature table Nicolas Chautru 2020-09-28 20:19 ` Akhil Goyal 2020-09-29 0:57 ` Chautru, Nicolas 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 00/10] bbdev PMD ACC100 Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 01/10] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 02/10] baseband/acc100: add register definition file Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 03/10] baseband/acc100: add info get function Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 04/10] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 05/10] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 06/10] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 07/10] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 08/10] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 09/10] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-28 23:52 ` [dpdk-dev] [PATCH v8 10/10] baseband/acc100: add configure function Nicolas Chautru 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 00/10] bbdev PMD ACC100 Nicolas Chautru 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 01/10] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-09-29 19:53 ` Tom Rix 2020-09-29 23:17 ` Chautru, Nicolas 2020-09-30 23:06 ` Tom Rix 2020-09-30 23:30 ` Chautru, Nicolas 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 02/10] baseband/acc100: add register definition file Nicolas Chautru 2020-09-29 20:34 ` Tom Rix 2020-09-29 23:30 ` Chautru, Nicolas 2020-09-30 23:11 ` Tom Rix 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 03/10] baseband/acc100: add info get function Nicolas Chautru 2020-09-29 21:13 ` Tom Rix 2020-09-30 0:25 ` Chautru, Nicolas 2020-09-30 23:20 ` Tom Rix 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 04/10] baseband/acc100: add queue configuration Nicolas Chautru 2020-09-29 21:46 ` Tom Rix 2020-09-30 1:03 ` Chautru, Nicolas 2020-09-30 23:36 ` Tom Rix 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 05/10] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-09-30 16:53 ` Tom Rix 2020-09-30 18:52 ` Chautru, Nicolas 2020-10-01 15:31 ` Tom Rix 2020-10-01 16:07 ` Chautru, Nicolas 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 06/10] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-09-30 17:25 ` Tom Rix 2020-09-30 18:55 ` Chautru, Nicolas 2020-10-01 15:32 ` Tom Rix 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 07/10] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-09-30 18:37 ` Tom Rix 2020-09-30 19:10 ` Chautru, Nicolas 2020-10-01 15:42 ` Tom Rix 2020-10-01 21:46 ` Chautru, Nicolas 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 08/10] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-09-30 19:03 ` Tom Rix 2020-09-30 19:45 ` Chautru, Nicolas 2020-10-01 16:05 ` Tom Rix 2020-10-01 21:07 ` Chautru, Nicolas 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 09/10] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-09-30 19:16 ` Tom Rix 2020-09-30 19:53 ` Chautru, Nicolas 2020-10-01 16:07 ` Tom Rix 2020-09-29 0:29 ` [dpdk-dev] [PATCH v9 10/10] baseband/acc100: add configure function Nicolas Chautru 2020-09-30 19:58 ` Tom Rix 2020-09-30 22:54 ` Chautru, Nicolas 2020-10-01 16:18 ` Tom Rix 2020-10-01 21:11 ` Chautru, Nicolas 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 00/10] bbdev PMD ACC100 Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 01/10] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 02/10] baseband/acc100: add register definition file Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 03/10] baseband/acc100: add info get function Nicolas Chautru 2020-10-01 14:34 ` Maxime Coquelin 2020-10-01 19:50 ` Chautru, Nicolas 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 04/10] baseband/acc100: add queue configuration Nicolas Chautru 2020-10-01 15:38 ` Maxime Coquelin 2020-10-01 19:50 ` Chautru, Nicolas 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 05/10] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 06/10] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 07/10] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 08/10] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 09/10] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-10-01 3:14 ` [dpdk-dev] [PATCH v10 10/10] baseband/acc100: add configure function Nicolas Chautru 2020-10-01 14:11 ` Maxime Coquelin 2020-10-01 15:36 ` Chautru, Nicolas 2020-10-01 15:43 ` Maxime Coquelin 2020-10-01 19:50 ` Chautru, Nicolas 2020-10-01 21:44 ` Maxime Coquelin 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 00/10] bbdev PMD ACC100 Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 01/10] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-10-04 15:53 ` Tom Rix 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 02/10] baseband/acc100: add register definition file Nicolas Chautru 2020-10-04 15:56 ` Tom Rix 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 03/10] baseband/acc100: add info get function Nicolas Chautru 2020-10-04 16:09 ` Tom Rix 2020-10-05 16:38 ` Chautru, Nicolas 2020-10-05 22:19 ` Chautru, Nicolas 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 04/10] baseband/acc100: add queue configuration Nicolas Chautru 2020-10-04 16:18 ` Tom Rix 2020-10-05 16:42 ` Chautru, Nicolas 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 05/10] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 06/10] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 07/10] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 08/10] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 09/10] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-10-02 1:01 ` [dpdk-dev] [PATCH v11 10/10] baseband/acc100: add configure function Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 00/10] bbdev PMD ACC100 Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 01/10] drivers/baseband: add PMD for ACC100 Nicolas Chautru 2020-11-02 9:25 ` Ferruh Yigit 2020-11-02 11:16 ` Ferruh Yigit 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 02/10] baseband/acc100: add register definition file Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 03/10] baseband/acc100: add info get function Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 04/10] baseband/acc100: add queue configuration Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 05/10] baseband/acc100: add LDPC processing functions Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 06/10] baseband/acc100: add HARQ loopback support Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 07/10] baseband/acc100: add support for 4G processing Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 08/10] baseband/acc100: add interrupt support to PMD Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 09/10] baseband/acc100: add debug function to validate input Nicolas Chautru 2020-10-05 22:12 ` [dpdk-dev] [PATCH v12 10/10] baseband/acc100: add configure function Nicolas Chautru 2020-10-06 13:20 ` [dpdk-dev] [PATCH v12 00/10] bbdev PMD ACC100 Maxime Coquelin 2020-10-06 19:43 ` Akhil Goyal
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