From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A7B9A04B5; Thu, 24 Sep 2020 14:19:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7E7DE1DEE4; Thu, 24 Sep 2020 14:13:56 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 265A11DE1F for ; Thu, 24 Sep 2020 14:13:02 +0200 (CEST) Received: from mx1-us1.ppe-hosted.com (unknown [10.7.65.64]) by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id A685460072 for ; Thu, 24 Sep 2020 12:13:01 +0000 (UTC) Received: from us4-mdac16-2.ut7.mdlocal (unknown [10.7.65.70]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id A54CD2009B for ; Thu, 24 Sep 2020 12:13:01 +0000 (UTC) X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.7.65.174]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 1BB5622004D for ; Thu, 24 Sep 2020 12:13:01 +0000 (UTC) Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id C611B1C0064 for ; Thu, 24 Sep 2020 12:13:00 +0000 (UTC) Received: from ukex01.SolarFlarecom.com (10.17.10.4) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 24 Sep 2020 13:12:47 +0100 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 24 Sep 2020 13:12:47 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 08OCClC5026039 for ; Thu, 24 Sep 2020 13:12:47 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id C2BB01613AB for ; Thu, 24 Sep 2020 13:12:47 +0100 (BST) From: Andrew Rybchenko To: Date: Thu, 24 Sep 2020 13:12:15 +0100 Message-ID: <1600949555-28043-41-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1600949555-28043-1-git-send-email-arybchenko@solarflare.com> References: <1600764594-14752-1-git-send-email-arybchenko@solarflare.com> <1600949555-28043-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.6.1012-25674.003 X-TM-AS-Result: No-0.290600-8.000000-10 X-TMASE-MatchedRID: poSTi58SzKtlMIveprqlOSqwx8x+s5lFD/niSB+IuEvRLEyE6G4DRJKP ruif6Wh8AKsS3xNBYzNUB6OiVSHalgJYAk2KgNKFHbdv6Uke88ATA7ACF0jdA/n6214PlHOFLxw lEQYmr0lv0SW6VO7X9Raynp4lvsDbG38URXpA0EJGjDwRSl8gFEyQ5fRSh265q2RzHFToRUjcru +PSMhej3xs7qFZ9FbOlWvEifGSynKNaXIAU/+zbGCRdM7s1cEUx3x+XnIcCMRVZCccrGnfyEJX5 ipOV5R9Jsva5FwlGDkiqRgiH5zaKie3oQ2VQKZMogGd8wIUGIIzH22M6ZNx7e+ZSsltrRyksFmz NLPWp6Iv4wYHM/ZD86tauEaVPYKj+vbnY9M6ab/KXbIv3mQNY2tNZoZ5+7ekBCzD0Dc8iUtRkYT SpSslRRXHQnJTzw1gYC/YICYnjNmoVqK8MEFjAlZ85UImhNtaUlUyzHUJOPf6eV5+LAaaX3BykT 02I/1d27R2A5g+67BBX5kYLXYNQ9JB4y9PVBuIHcQQBuf4ZFs8Via9JYHCQNduC8D5HN5wGfvPW 1SMGjTi8zVgXoAltsIJ+4gwXrEtWBd6ltyXuvtg+syrA+qeaK+RcKCRsKKkMwkOE1eFsqnoPqmg ApsByQxE9O6Ph69yNdCI6Qe53Fh0qsM4MWum4iLxvYLMR4mcJYbGKSvmGNKqFrt9xUgp+uq+T0I cdvQ1BtPt5WQTZkLauEQaIW46K4YinWuMIb+iftwZ3X11IV0= X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10-0.290600-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.6.1012-25674.003 X-MDID: 1600949581-PB4zYUuI5Hme Subject: [dpdk-dev] [PATCH v3 40/60] common/sfc_efx/base: add API to get Rx prefix information X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Define default Siena, EF10 default, packed stream, equal-stride superbuffer and Riverhead default prefixes in order to make an API to get Rx prefix layout information generic and usable on all NICs. Riverhead supports many Rx prefixes. Riverhead FW supports MCDI to choose Rx prefix based on required Rx prefix fields and allows to query the prefix layout using MCDI. The patch prepares to introduce the support in libefx and provides fallback for NICs and FW which lacks the support. Signed-off-by: Andrew Rybchenko Reviewed-by: Andy Moreton --- drivers/common/sfc_efx/base/ef10_rx.c | 80 ++++++++++++++++++- drivers/common/sfc_efx/base/efx.h | 61 ++++++++++++++ drivers/common/sfc_efx/base/efx_impl.h | 1 + drivers/common/sfc_efx/base/efx_rx.c | 29 +++++++ drivers/common/sfc_efx/base/efx_types.h | 1 + drivers/common/sfc_efx/base/rhead_rx.c | 30 +++++++ .../sfc_efx/rte_common_sfc_efx_version.map | 1 + 7 files changed, 201 insertions(+), 2 deletions(-) diff --git a/drivers/common/sfc_efx/base/ef10_rx.c b/drivers/common/sfc_efx/base/ef10_rx.c index 2f0d2d2f5b..43d545b377 100644 --- a/drivers/common/sfc_efx/base/ef10_rx.c +++ b/drivers/common/sfc_efx/base/ef10_rx.c @@ -549,8 +549,8 @@ ef10_rx_scale_tbl_set( #if EFX_OPTS_EF10() /* - * EF10 RX pseudo-header - * --------------------- + * EF10 RX pseudo-header (aka Rx prefix) + * ------------------------------------- * * Receive packets are prefixed by an (optional) 14 byte pseudo-header: * @@ -566,7 +566,77 @@ ef10_rx_scale_tbl_set( * (32bit little-endian) * * See "The RX Pseudo-header" in SF-109306-TC. + * + * EF10 does not support Rx prefix choice using MC_CMD_GET_RX_PREFIX_ID + * and query its layout using MC_CMD_QUERY_RX_PREFIX_ID. */ +static const efx_rx_prefix_layout_t ef10_default_rx_prefix_layout = { + .erpl_id = 0, + .erpl_length = 14, + .erpl_fields = { + [EFX_RX_PREFIX_FIELD_RSS_HASH] = + { 0, 32, B_FALSE }, + [EFX_RX_PREFIX_FIELD_VLAN_STRIP_TCI] = + { 32, 16, B_TRUE }, + [EFX_RX_PREFIX_FIELD_INNER_VLAN_STRIP_TCI] = + { 48, 16, B_TRUE }, + [EFX_RX_PREFIX_FIELD_LENGTH] = + { 64, 16, B_FALSE }, + [EFX_RX_PREFIX_FIELD_PARTIAL_TSTAMP] = + { 80, 32, B_FALSE }, + } +}; + +#if EFSYS_OPT_RX_PACKED_STREAM + +/* + * EF10 packed stream Rx prefix layout. + * + * See SF-112241-TC Full speed capture for Huntington and Medford section 4.5. + */ +static const efx_rx_prefix_layout_t ef10_packed_stream_rx_prefix_layout = { + .erpl_id = 0, + .erpl_length = 8, + .erpl_fields = { +#define EF10_PS_RX_PREFIX_FIELD(_efx, _ef10) \ + EFX_RX_PREFIX_FIELD(_efx, ES_DZ_PS_RX_PREFIX_ ## _ef10, B_FALSE) + + EF10_PS_RX_PREFIX_FIELD(PARTIAL_TSTAMP, TSTAMP), + EF10_PS_RX_PREFIX_FIELD(LENGTH, CAP_LEN), + EF10_PS_RX_PREFIX_FIELD(ORIG_LENGTH, ORIG_LEN), + +#undef EF10_PS_RX_PREFIX_FIELD + } +}; + +#endif /* EFSYS_OPT_RX_PACKED_STREAM */ + +#if EFSYS_OPT_RX_ES_SUPER_BUFFER + +/* + * EF10 equal stride super-buffer Rx prefix layout. + * + * See SF-119419-TC DPDK Firmware Driver Interface section 3.4. + */ +static const efx_rx_prefix_layout_t ef10_essb_rx_prefix_layout = { + .erpl_id = 0, + .erpl_length = ES_EZ_ESSB_RX_PREFIX_LEN, + .erpl_fields = { +#define EF10_ESSB_RX_PREFIX_FIELD(_efx, _ef10) \ + EFX_RX_PREFIX_FIELD(_efx, ES_EZ_ESSB_RX_PREFIX_ ## _ef10, B_FALSE) + + EF10_ESSB_RX_PREFIX_FIELD(LENGTH, DATA_LEN), + EF10_ESSB_RX_PREFIX_FIELD(USER_MARK, MARK), + EF10_ESSB_RX_PREFIX_FIELD(RSS_HASH_VALID, HASH_VALID), + EF10_ESSB_RX_PREFIX_FIELD(USER_MARK_VALID, MARK_VALID), + EF10_ESSB_RX_PREFIX_FIELD(USER_FLAG, MATCH_FLAG), + EF10_ESSB_RX_PREFIX_FIELD(RSS_HASH, HASH), + +#undef EF10_ESSB_RX_PREFIX_FIELD + } +}; + +#endif /* EFSYS_OPT_RX_ES_SUPER_BUFFER */ __checkReturn efx_rc_t ef10_rx_prefix_pktlen( @@ -836,6 +906,7 @@ ef10_rx_qcreate( __in efx_rxq_t *erp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + const efx_rx_prefix_layout_t *erpl; efx_rc_t rc; boolean_t disable_scatter; boolean_t want_inner_classes; @@ -852,6 +923,7 @@ ef10_rx_qcreate( switch (type) { case EFX_RXQ_TYPE_DEFAULT: + erpl = &ef10_default_rx_prefix_layout; if (type_data == NULL) { rc = EINVAL; goto fail1; @@ -861,6 +933,7 @@ ef10_rx_qcreate( break; #if EFSYS_OPT_RX_PACKED_STREAM case EFX_RXQ_TYPE_PACKED_STREAM: + erpl = &ef10_packed_stream_rx_prefix_layout; if (type_data == NULL) { rc = EINVAL; goto fail2; @@ -890,6 +963,7 @@ ef10_rx_qcreate( #endif /* EFSYS_OPT_RX_PACKED_STREAM */ #if EFSYS_OPT_RX_ES_SUPER_BUFFER case EFX_RXQ_TYPE_ES_SUPER_BUFFER: + erpl = &ef10_essb_rx_prefix_layout; if (type_data == NULL) { rc = EINVAL; goto fail4; @@ -973,6 +1047,8 @@ ef10_rx_qcreate( erp->er_ev_qstate = &erp->er_eep->ee_rxq_state[label]; + erp->er_prefix_layout = *erpl; + return (0); fail11: diff --git a/drivers/common/sfc_efx/base/efx.h b/drivers/common/sfc_efx/base/efx.h index a2c2e49bba..41222a71f1 100644 --- a/drivers/common/sfc_efx/base/efx.h +++ b/drivers/common/sfc_efx/base/efx.h @@ -1396,6 +1396,7 @@ typedef struct efx_nic_cfg_s { uint32_t enc_ev_desc_size; uint32_t enc_rx_desc_size; uint32_t enc_tx_desc_size; + /* Maximum Rx prefix size if many Rx prefixes are supported */ uint32_t enc_rx_prefix_size; uint32_t enc_rx_buf_align_start; uint32_t enc_rx_buf_align_end; @@ -2760,6 +2761,66 @@ efx_rxq_nbufs( #define EFX_RXQ_LIMIT(_ndescs) ((_ndescs) - 16) +/* + * libefx representation of the Rx prefix layout information. + * + * The information may be used inside libefx to implement Rx prefix fields + * accessors and by drivers which process Rx prefix itself. + */ + +/* + * All known Rx prefix fields. + * + * An Rx prefix may have a subset of these fields. + */ +typedef enum efx_rx_prefix_field_e { + EFX_RX_PREFIX_FIELD_LENGTH = 0, + EFX_RX_PREFIX_FIELD_ORIG_LENGTH, + EFX_RX_PREFIX_FIELD_CLASS, + EFX_RX_PREFIX_FIELD_RSS_HASH, + EFX_RX_PREFIX_FIELD_RSS_HASH_VALID, + EFX_RX_PREFIX_FIELD_PARTIAL_TSTAMP, + EFX_RX_PREFIX_FIELD_VLAN_STRIP_TCI, + EFX_RX_PREFIX_FIELD_INNER_VLAN_STRIP_TCI, + EFX_RX_PREFIX_FIELD_USER_FLAG, + EFX_RX_PREFIX_FIELD_USER_MARK, + EFX_RX_PREFIX_FIELD_USER_MARK_VALID, + EFX_RX_PREFIX_FIELD_CSUM_FRAME, + EFX_RX_PREFIX_FIELD_INGRESS_VPORT, + EFX_RX_PREFIX_NFIELDS +} efx_rx_prefix_field_t; + +/* + * Location and endianness of a field in Rx prefix. + * + * If width is zero, the field is not present. + */ +typedef struct efx_rx_prefix_field_info_s { + uint16_t erpfi_offset_bits; + uint8_t erpfi_width_bits; + boolean_t erpfi_big_endian; +} efx_rx_prefix_field_info_t; + +/* Helper macro to define Rx prefix fields */ +#define EFX_RX_PREFIX_FIELD(_efx, _field, _big_endian) \ + [EFX_RX_PREFIX_FIELD_ ## _efx] = { \ + .erpfi_offset_bits = EFX_LOW_BIT(_field), \ + .erpfi_width_bits = EFX_WIDTH(_field), \ + .erpfi_big_endian = (_big_endian), \ + } + +typedef struct efx_rx_prefix_layout_s { + uint32_t erpl_id; + uint8_t erpl_length; + efx_rx_prefix_field_info_t erpl_fields[EFX_RX_PREFIX_NFIELDS]; +} efx_rx_prefix_layout_t; + +LIBEFX_API +extern __checkReturn efx_rc_t +efx_rx_prefix_get_layout( + __in const efx_rxq_t *erp, + __out efx_rx_prefix_layout_t *erplp); + typedef enum efx_rxq_type_e { EFX_RXQ_TYPE_DEFAULT, EFX_RXQ_TYPE_PACKED_STREAM, diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h index 52f974073f..01869155fa 100644 --- a/drivers/common/sfc_efx/base/efx_impl.h +++ b/drivers/common/sfc_efx/base/efx_impl.h @@ -944,6 +944,7 @@ struct efx_rxq_s { size_t er_buf_size; efsys_mem_t *er_esmp; efx_evq_rxq_state_t *er_ev_qstate; + efx_rx_prefix_layout_t er_prefix_layout; }; #define EFX_RXQ_MAGIC 0x15022005 diff --git a/drivers/common/sfc_efx/base/efx_rx.c b/drivers/common/sfc_efx/base/efx_rx.c index 14eda45f4a..3536b0eb07 100644 --- a/drivers/common/sfc_efx/base/efx_rx.c +++ b/drivers/common/sfc_efx/base/efx_rx.c @@ -1059,6 +1059,18 @@ efx_pseudo_hdr_hash_get( } #endif /* EFSYS_OPT_RX_SCALE */ + __checkReturn efx_rc_t +efx_rx_prefix_get_layout( + __in const efx_rxq_t *erp, + __out efx_rx_prefix_layout_t *erplp) +{ + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + *erplp = erp->er_prefix_layout; + + return (0); +} + #if EFSYS_OPT_SIENA static __checkReturn efx_rc_t @@ -1477,6 +1489,21 @@ siena_rx_scale_tbl_set( * LL.LL LFSR hash (16-bit big-endian) */ +/* + * Provide Rx prefix layout with Toeplitz hash only since LSFR is + * used by no supported drivers. + * + * Siena does not support Rx prefix choice via MC_CMD_GET_RX_PREFIX_ID + * and query its layout using MC_CMD_QUERY_RX_PREFIX_ID. + */ +static const efx_rx_prefix_layout_t siena_toeplitz_rx_prefix_layout = { + .erpl_id = 0, + .erpl_length = 16, + .erpl_fields = { + [EFX_RX_PREFIX_FIELD_RSS_HASH] = { 12 * 8, 32, B_TRUE }, + } +}; + #if EFSYS_OPT_RX_SCALE static __checkReturn uint32_t siena_rx_prefix_hash( @@ -1719,6 +1746,8 @@ siena_rx_qcreate( EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL, erp->er_index, &oword, B_TRUE); + erp->er_prefix_layout = siena_toeplitz_rx_prefix_layout; + return (0); #if !EFSYS_OPT_RX_SCATTER diff --git a/drivers/common/sfc_efx/base/efx_types.h b/drivers/common/sfc_efx/base/efx_types.h index ae8a1031df..ab35e61b84 100644 --- a/drivers/common/sfc_efx/base/efx_types.h +++ b/drivers/common/sfc_efx/base/efx_types.h @@ -1628,6 +1628,7 @@ extern int fix_lint; #define EFX_AND_QWORD EFX_AND_QWORD32 #endif + #ifdef __cplusplus } #endif diff --git a/drivers/common/sfc_efx/base/rhead_rx.c b/drivers/common/sfc_efx/base/rhead_rx.c index 0081b3ea53..c9ab3f92e1 100644 --- a/drivers/common/sfc_efx/base/rhead_rx.c +++ b/drivers/common/sfc_efx/base/rhead_rx.c @@ -10,6 +10,35 @@ #if EFSYS_OPT_RIVERHEAD +/* + * Default Rx prefix layout on Riverhead if FW does not support Rx + * prefix choice using MC_CMD_GET_RX_PREFIX_ID and query its layout + * using MC_CMD_QUERY_RX_PREFIX_ID. + * + * See SF-119689-TC Riverhead Host Interface section 6.4. + */ +static const efx_rx_prefix_layout_t rhead_default_rx_prefix_layout = { + .erpl_id = 0, + .erpl_length = ESE_GZ_RX_PKT_PREFIX_LEN, + .erpl_fields = { +#define RHEAD_RX_PREFIX_FIELD(_name, _big_endian) \ + EFX_RX_PREFIX_FIELD(_name, ESF_GZ_RX_PREFIX_ ## _name, _big_endian) + + RHEAD_RX_PREFIX_FIELD(LENGTH, B_FALSE), + RHEAD_RX_PREFIX_FIELD(RSS_HASH_VALID, B_FALSE), + RHEAD_RX_PREFIX_FIELD(USER_FLAG, B_FALSE), + RHEAD_RX_PREFIX_FIELD(CLASS, B_FALSE), + RHEAD_RX_PREFIX_FIELD(PARTIAL_TSTAMP, B_FALSE), + RHEAD_RX_PREFIX_FIELD(RSS_HASH, B_FALSE), + RHEAD_RX_PREFIX_FIELD(USER_MARK, B_FALSE), + RHEAD_RX_PREFIX_FIELD(INGRESS_VPORT, B_FALSE), + RHEAD_RX_PREFIX_FIELD(CSUM_FRAME, B_TRUE), + RHEAD_RX_PREFIX_FIELD(VLAN_STRIP_TCI, B_TRUE), + +#undef RHEAD_RX_PREFIX_FIELD + } +}; + __checkReturn efx_rc_t rhead_rx_init( __in efx_nic_t *enp) @@ -292,6 +321,7 @@ rhead_rx_qcreate( erp->er_eep = eep; erp->er_label = label; + erp->er_prefix_layout = rhead_default_rx_prefix_layout; return (0); diff --git a/drivers/common/sfc_efx/rte_common_sfc_efx_version.map b/drivers/common/sfc_efx/rte_common_sfc_efx_version.map index 9b1715bfee..16fffee321 100644 --- a/drivers/common/sfc_efx/rte_common_sfc_efx_version.map +++ b/drivers/common/sfc_efx/rte_common_sfc_efx_version.map @@ -130,6 +130,7 @@ INTERNAL { efx_rx_fini; efx_rx_hash_default_support_get; efx_rx_init; + efx_rx_prefix_get_layout; efx_rx_qcreate; efx_rx_qcreate_es_super_buffer; efx_rx_qdestroy; -- 2.17.1