From: Andrew Rybchenko <arybchenko@solarflare.com>
To: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH 26/36] net/sfc: support Rx checksum offload for EF100
Date: Tue, 13 Oct 2020 14:45:43 +0100 [thread overview]
Message-ID: <1602596753-32282-27-git-send-email-arybchenko@solarflare.com> (raw)
In-Reply-To: <1602596753-32282-1-git-send-email-arybchenko@solarflare.com>
Also support Rx packet type offload.
Checksumming is actually always enabled. Report it per-queue offload
to give applications maximum flexibility.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/net/sfc/sfc_ef100_rx.c | 183 ++++++++++++++++++++++++++++++++-
1 file changed, 182 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sfc/sfc_ef100_rx.c b/drivers/net/sfc/sfc_ef100_rx.c
index c0e70c9943..2f5c5ab533 100644
--- a/drivers/net/sfc/sfc_ef100_rx.c
+++ b/drivers/net/sfc/sfc_ef100_rx.c
@@ -177,6 +177,166 @@ sfc_ef100_rx_qrefill(struct sfc_ef100_rxq *rxq)
sfc_ef100_rx_qpush(rxq, added);
}
+static inline uint64_t
+sfc_ef100_rx_nt_or_inner_l4_csum(const efx_word_t class)
+{
+ return EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L4_CSUM) ==
+ ESE_GZ_RH_HCLASS_L4_CSUM_GOOD ?
+ PKT_RX_L4_CKSUM_GOOD : PKT_RX_L4_CKSUM_BAD;
+}
+
+static inline uint64_t
+sfc_ef100_rx_tun_outer_l4_csum(const efx_word_t class)
+{
+ return EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_TUN_OUTER_L4_CSUM) ==
+ ESE_GZ_RH_HCLASS_L4_CSUM_GOOD ?
+ PKT_RX_OUTER_L4_CKSUM_GOOD : PKT_RX_OUTER_L4_CKSUM_GOOD;
+}
+
+static uint32_t
+sfc_ef100_rx_class_decode(const efx_word_t class, uint64_t *ol_flags)
+{
+ uint32_t ptype;
+ bool no_tunnel = false;
+
+ if (unlikely(EFX_WORD_FIELD(class, ESF_GZ_RX_PREFIX_HCLASS_L2_CLASS) !=
+ ESE_GZ_RH_HCLASS_L2_CLASS_E2_0123VLAN))
+ return 0;
+
+ switch (EFX_WORD_FIELD(class, ESF_GZ_RX_PREFIX_HCLASS_L2_N_VLAN)) {
+ case 0:
+ ptype = RTE_PTYPE_L2_ETHER;
+ break;
+ case 1:
+ ptype = RTE_PTYPE_L2_ETHER_VLAN;
+ break;
+ default:
+ ptype = RTE_PTYPE_L2_ETHER_QINQ;
+ break;
+ }
+
+ switch (EFX_WORD_FIELD(class, ESF_GZ_RX_PREFIX_HCLASS_TUNNEL_CLASS)) {
+ case ESE_GZ_RH_HCLASS_TUNNEL_CLASS_NONE:
+ no_tunnel = true;
+ break;
+ case ESE_GZ_RH_HCLASS_TUNNEL_CLASS_VXLAN:
+ ptype |= RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP;
+ *ol_flags |= sfc_ef100_rx_tun_outer_l4_csum(class);
+ break;
+ case ESE_GZ_RH_HCLASS_TUNNEL_CLASS_NVGRE:
+ ptype |= RTE_PTYPE_TUNNEL_NVGRE;
+ break;
+ case ESE_GZ_RH_HCLASS_TUNNEL_CLASS_GENEVE:
+ ptype |= RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP;
+ *ol_flags |= sfc_ef100_rx_tun_outer_l4_csum(class);
+ break;
+ default:
+ /*
+ * Driver does not know the tunnel, but it is
+ * still a tunnel and NT_OR_INNER refer to inner
+ * frame.
+ */
+ no_tunnel = false;
+ }
+
+ if (no_tunnel) {
+ bool l4_valid = true;
+
+ switch (EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L3_CLASS)) {
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4GOOD:
+ ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
+ *ol_flags |= PKT_RX_IP_CKSUM_GOOD;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
+ ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
+ *ol_flags |= PKT_RX_IP_CKSUM_BAD;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
+ ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
+ break;
+ default:
+ l4_valid = false;
+ }
+
+ if (l4_valid) {
+ switch (EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L4_CLASS)) {
+ case ESE_GZ_RH_HCLASS_L4_CLASS_TCP:
+ ptype |= RTE_PTYPE_L4_TCP;
+ *ol_flags |=
+ sfc_ef100_rx_nt_or_inner_l4_csum(class);
+ break;
+ case ESE_GZ_RH_HCLASS_L4_CLASS_UDP:
+ ptype |= RTE_PTYPE_L4_UDP;
+ *ol_flags |=
+ sfc_ef100_rx_nt_or_inner_l4_csum(class);
+ break;
+ case ESE_GZ_RH_HCLASS_L4_CLASS_FRAG:
+ ptype |= RTE_PTYPE_L4_FRAG;
+ break;
+ }
+ }
+ } else {
+ bool l4_valid = true;
+
+ switch (EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_TUN_OUTER_L3_CLASS)) {
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4GOOD:
+ ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
+ ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
+ *ol_flags |= PKT_RX_EIP_CKSUM_BAD;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
+ ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
+ break;
+ }
+
+ switch (EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L3_CLASS)) {
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4GOOD:
+ ptype |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
+ *ol_flags |= PKT_RX_IP_CKSUM_GOOD;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
+ ptype |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
+ *ol_flags |= PKT_RX_IP_CKSUM_BAD;
+ break;
+ case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
+ ptype |= RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
+ break;
+ default:
+ l4_valid = false;
+ break;
+ }
+
+ if (l4_valid) {
+ switch (EFX_WORD_FIELD(class,
+ ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L4_CLASS)) {
+ case ESE_GZ_RH_HCLASS_L4_CLASS_TCP:
+ ptype |= RTE_PTYPE_INNER_L4_TCP;
+ *ol_flags |=
+ sfc_ef100_rx_nt_or_inner_l4_csum(class);
+ break;
+ case ESE_GZ_RH_HCLASS_L4_CLASS_UDP:
+ ptype |= RTE_PTYPE_INNER_L4_UDP;
+ *ol_flags |=
+ sfc_ef100_rx_nt_or_inner_l4_csum(class);
+ break;
+ case ESE_GZ_RH_HCLASS_L4_CLASS_FRAG:
+ ptype |= RTE_PTYPE_INNER_L4_FRAG;
+ break;
+ }
+ }
+ }
+
+ return ptype;
+}
+
static bool
sfc_ef100_rx_prefix_to_offloads(const efx_oword_t *rx_prefix,
struct rte_mbuf *m)
@@ -195,6 +355,8 @@ sfc_ef100_rx_prefix_to_offloads(const efx_oword_t *rx_prefix,
ESE_GZ_RH_HCLASS_L2_STATUS_OK))
return false;
+ m->packet_type = sfc_ef100_rx_class_decode(*class, &ol_flags);
+
m->ol_flags = ol_flags;
return true;
}
@@ -374,6 +536,22 @@ static const uint32_t *
sfc_ef100_supported_ptypes_get(__rte_unused uint32_t tunnel_encaps)
{
static const uint32_t ef100_native_ptypes[] = {
+ RTE_PTYPE_L2_ETHER,
+ RTE_PTYPE_L2_ETHER_VLAN,
+ RTE_PTYPE_L2_ETHER_QINQ,
+ RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
+ RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
+ RTE_PTYPE_L4_TCP,
+ RTE_PTYPE_L4_UDP,
+ RTE_PTYPE_L4_FRAG,
+ RTE_PTYPE_TUNNEL_VXLAN,
+ RTE_PTYPE_TUNNEL_NVGRE,
+ RTE_PTYPE_TUNNEL_GENEVE,
+ RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
+ RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
+ RTE_PTYPE_INNER_L4_TCP,
+ RTE_PTYPE_INNER_L4_UDP,
+ RTE_PTYPE_INNER_L4_FRAG,
RTE_PTYPE_UNKNOWN
};
@@ -596,7 +774,10 @@ struct sfc_dp_rx sfc_ef100_rx = {
},
.features = SFC_DP_RX_FEAT_MULTI_PROCESS,
.dev_offload_capa = 0,
- .queue_offload_capa = DEV_RX_OFFLOAD_SCATTER,
+ .queue_offload_capa = DEV_RX_OFFLOAD_CHECKSUM |
+ DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+ DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
+ DEV_RX_OFFLOAD_SCATTER,
.get_dev_info = sfc_ef100_rx_get_dev_info,
.qsize_up_rings = sfc_ef100_rx_qsize_up_rings,
.qcreate = sfc_ef100_rx_qcreate,
--
2.17.1
next prev parent reply other threads:[~2020-10-13 13:58 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-13 13:45 [dpdk-dev] [PATCH 00/36] net/sfc: add EF100 support Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 01/36] doc: fix typo in EF10 Rx equal stride super-buffer name Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 02/36] doc: avoid references to removed config variables in net/sfc Andrew Rybchenko
2020-10-14 10:40 ` Ferruh Yigit
2020-10-13 13:45 ` [dpdk-dev] [PATCH 03/36] common/sfc_efx/base: factor out wrapper to set PHY link Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 04/36] common/sfc_efx/base: factor out MCDI wrapper to set LEDs Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 05/36] common/sfc_efx/base: fix PHY config failure on Riverhead Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 06/36] common/sfc_efx/base: add max number of Rx scatter buffers Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 07/36] net/sfc: check vs maximum " Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 08/36] net/sfc: log Rx/Tx doorbell addresses useful for debugging Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 09/36] net/sfc: add caps to specify if libefx supports Rx/Tx Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 10/36] net/sfc: add EF100 support Andrew Rybchenko
2020-10-14 10:40 ` Ferruh Yigit
2020-10-14 11:21 ` Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 11/36] net/sfc: use BAR layout discovery to find control window Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 12/36] net/sfc: implement libefx Rx packets event callbacks Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 13/36] net/sfc: implement libefx Tx descs complete " Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 14/36] net/sfc: log DMA allocations addresses Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 15/36] net/sfc: support datapath logs which may be compiled out Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 16/36] net/sfc: implement EF100 native Rx datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 17/36] net/sfc: implement EF100 native Tx datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 18/36] net/sfc: support multi-segment transmit for EF100 datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 19/36] net/sfc: support TCP and UDP checksum offloads for EF100 Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 20/36] net/sfc: support IPv4 header checksum offload for EF100 Tx Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 21/36] net/sfc: add header segments check for EF100 Tx datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 22/36] net/sfc: support tunnels for EF100 native " Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 23/36] net/sfc: support TSO for EF100 native datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 24/36] net/sfc: support tunnel TSO for EF100 native Tx datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 25/36] net/sfc: support Tx VLAN insertion offload for EF100 Andrew Rybchenko
2020-10-13 13:45 ` Andrew Rybchenko [this message]
2020-10-13 13:45 ` [dpdk-dev] [PATCH 27/36] common/sfc_efx/base: simplify to request Rx prefix fields Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 28/36] common/sfc_efx/base: provide control to deliver RSS hash Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 29/36] common/sfc_efx/base: provide helper to check Rx prefix Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 30/36] net/sfc: map Rx offload RSS hash to corresponding RxQ flag Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 31/36] net/sfc: support per-queue Rx prefix for EF100 Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 32/36] net/sfc: support per-queue Rx RSS hash offload " Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 33/36] net/sfc: support user mark and flag Rx " Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 34/36] net/sfc: forward function control window offset to datapath Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 35/36] net/sfc: add Rx interrupts support for EF100 Andrew Rybchenko
2020-10-13 13:45 ` [dpdk-dev] [PATCH 36/36] doc: advertise Alveo SN1000 SmartNICs family support Andrew Rybchenko
2020-10-14 10:41 ` Ferruh Yigit
2020-10-14 11:15 ` Andrew Rybchenko
2020-10-14 10:41 ` [dpdk-dev] [PATCH 00/36] net/sfc: add EF100 support Ferruh Yigit
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