From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DB02BA04DD; Tue, 20 Oct 2020 11:12:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A11E8E252; Tue, 20 Oct 2020 10:50:39 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id D7EC0BBC6 for ; Tue, 20 Oct 2020 10:49:10 +0200 (CEST) Received: from mx1-us1.ppe-hosted.com (unknown [10.7.65.64]) by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 679B36004F for ; Tue, 20 Oct 2020 08:49:09 +0000 (UTC) Received: from us4-mdac16-1.ut7.mdlocal (unknown [10.7.65.69]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 6742D200A4 for ; Tue, 20 Oct 2020 08:49:09 +0000 (UTC) X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.7.65.199]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 46A6122004D for ; Tue, 20 Oct 2020 08:49:08 +0000 (UTC) Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id F0EFC18005B for ; Tue, 20 Oct 2020 08:49:07 +0000 (UTC) Received: from ukex01.SolarFlarecom.com (10.17.10.4) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 20 Oct 2020 09:48:51 +0100 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 20 Oct 2020 09:48:51 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 09K8mo3p030930; Tue, 20 Oct 2020 09:48:50 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id DF5DC1613A9; Tue, 20 Oct 2020 09:48:50 +0100 (BST) From: Andrew Rybchenko To: CC: , Ivan Malov Date: Tue, 20 Oct 2020 09:48:26 +0100 Message-ID: <1603183709-23420-60-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603183709-23420-1-git-send-email-arybchenko@solarflare.com> References: <1603183709-23420-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.6.1012-25736.003 X-TM-AS-Result: No-0.108200-8.000000-10 X-TMASE-MatchedRID: VmQnTTPLPg/MNfmX7cQoSspdsi/eZA1jaeMaKzvXUpljLp8Cm8vwF7KB pljvKsfOfGzuoVn0Vs6PQi9XuOWoONS7ezKc1Aokx5sgyUhLCNv3+mUqDWUKyF9QIc+ez/4+lSp EXhOCtBS9ScRxnMR7bitS3PG+1A2HWBF4xKGSZdloUArKobkzYlBijjE0XjY+GlfXMQviercMwu JBqQIpuemp9HBDaWugEarACDIZa3lUzR/yBHQjZsewkPVzkoGN8Cg+ULTCPpmbKItl61J/yZ+in TK0bC9eKrauXd3MZDVNXZdfUYkK/9Xsj4rlw2f6IQAAYCZV3NwHz0Cj1aP8G/5dQyNHcjPP/Qve 5Mgu3Xti6cHGNRve5BPszTkhMOsa1nj+CgxsDEvAhs1woh/pKjigZBQJvBjlD6DuZ3COjrnoW0N kKZgEnW3LgNyHejuiQwymtxuJ6y0= X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--0.108200-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.6.1012-25736.003 X-MDID: 1603183748-rzKI_Tth7pfS X-PPE-DISP: 1603183748;rzKI_Tth7pfS Subject: [dpdk-dev] [PATCH 59/62] common/sfc_efx/base: validate and compare outer match specs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ivan Malov Let the client validate an outer match specification. Let the client comprare classes of two outer match specifications. Signed-off-by: Ivan Malov Signed-off-by: Andrew Rybchenko Reviewed-by: Andy Moreton --- drivers/common/sfc_efx/base/efx_impl.h | 3 + drivers/common/sfc_efx/base/efx_mae.c | 126 ++++++++++++++++++++++++- 2 files changed, 126 insertions(+), 3 deletions(-) diff --git a/drivers/common/sfc_efx/base/efx_impl.h b/drivers/common/sfc_efx/base/efx_impl.h index 6a8b8d65f1..d8423d49fe 100644 --- a/drivers/common/sfc_efx/base/efx_impl.h +++ b/drivers/common/sfc_efx/base/efx_impl.h @@ -800,6 +800,9 @@ typedef struct efx_mae_s { size_t em_action_rule_field_caps_size; uint32_t em_max_n_outer_prios; uint32_t em_encap_types_supported; + /** Outer rule match field capabilities. */ + efx_mae_field_cap_t *em_outer_rule_field_caps; + size_t em_outer_rule_field_caps_size; } efx_mae_t; #endif /* EFSYS_OPT_MAE */ diff --git a/drivers/common/sfc_efx/base/efx_mae.c b/drivers/common/sfc_efx/base/efx_mae.c index 935cec5e18..45a796fdad 100644 --- a/drivers/common/sfc_efx/base/efx_mae.c +++ b/drivers/common/sfc_efx/base/efx_mae.c @@ -74,6 +74,88 @@ efx_mae_get_capabilities( return (rc); } +static __checkReturn efx_rc_t +efx_mae_get_outer_rule_caps( + __in efx_nic_t *enp, + __in unsigned int field_ncaps, + __out_ecount(field_ncaps) efx_mae_field_cap_t *field_caps) +{ + efx_mcdi_req_t req; + EFX_MCDI_DECLARE_BUF(payload, + MC_CMD_MAE_GET_OR_CAPS_IN_LEN, + MC_CMD_MAE_GET_OR_CAPS_OUT_LENMAX_MCDI2); + unsigned int mcdi_field_ncaps; + unsigned int i; + efx_rc_t rc; + + if (MC_CMD_MAE_GET_OR_CAPS_OUT_LEN(field_ncaps) > + MC_CMD_MAE_GET_OR_CAPS_OUT_LENMAX_MCDI2) { + rc = EINVAL; + goto fail1; + } + + req.emr_cmd = MC_CMD_MAE_GET_OR_CAPS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_MAE_GET_OR_CAPS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_MAE_GET_OR_CAPS_OUT_LEN(field_ncaps); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + mcdi_field_ncaps = MCDI_OUT_DWORD(req, MAE_GET_OR_CAPS_OUT_COUNT); + + if (req.emr_out_length_used < + MC_CMD_MAE_GET_OR_CAPS_OUT_LEN(mcdi_field_ncaps)) { + rc = EMSGSIZE; + goto fail3; + } + + if (mcdi_field_ncaps > field_ncaps) { + rc = EMSGSIZE; + goto fail4; + } + + for (i = 0; i < mcdi_field_ncaps; ++i) { + uint32_t match_flag; + uint32_t mask_flag; + + field_caps[i].emfc_support = MCDI_OUT_INDEXED_DWORD_FIELD(req, + MAE_GET_OR_CAPS_OUT_FIELD_FLAGS, i, + MAE_FIELD_FLAGS_SUPPORT_STATUS); + + match_flag = MCDI_OUT_INDEXED_DWORD_FIELD(req, + MAE_GET_OR_CAPS_OUT_FIELD_FLAGS, i, + MAE_FIELD_FLAGS_MATCH_AFFECTS_CLASS); + + field_caps[i].emfc_match_affects_class = + (match_flag != 0) ? B_TRUE : B_FALSE; + + mask_flag = MCDI_OUT_INDEXED_DWORD_FIELD(req, + MAE_GET_OR_CAPS_OUT_FIELD_FLAGS, i, + MAE_FIELD_FLAGS_MASK_AFFECTS_CLASS); + + field_caps[i].emfc_mask_affects_class = + (mask_flag != 0) ? B_TRUE : B_FALSE; + } + + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + return (rc); +} + static __checkReturn efx_rc_t efx_mae_get_action_rule_caps( __in efx_nic_t *enp, @@ -161,6 +243,8 @@ efx_mae_init( __in efx_nic_t *enp) { const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp); + efx_mae_field_cap_t *or_fcaps; + size_t or_fcaps_size; efx_mae_field_cap_t *ar_fcaps; size_t ar_fcaps_size; efx_mae_t *maep; @@ -183,11 +267,25 @@ efx_mae_init( if (rc != 0) goto fail3; + or_fcaps_size = maep->em_max_nfields * sizeof (*or_fcaps); + EFSYS_KMEM_ALLOC(enp->en_esip, or_fcaps_size, or_fcaps); + if (or_fcaps == NULL) { + rc = ENOMEM; + goto fail4; + } + + maep->em_outer_rule_field_caps_size = or_fcaps_size; + maep->em_outer_rule_field_caps = or_fcaps; + + rc = efx_mae_get_outer_rule_caps(enp, maep->em_max_nfields, or_fcaps); + if (rc != 0) + goto fail5; + ar_fcaps_size = maep->em_max_nfields * sizeof (*ar_fcaps); EFSYS_KMEM_ALLOC(enp->en_esip, ar_fcaps_size, ar_fcaps); if (ar_fcaps == NULL) { rc = ENOMEM; - goto fail4; + goto fail6; } maep->em_action_rule_field_caps_size = ar_fcaps_size; @@ -195,13 +293,18 @@ efx_mae_init( rc = efx_mae_get_action_rule_caps(enp, maep->em_max_nfields, ar_fcaps); if (rc != 0) - goto fail5; + goto fail7; return (0); -fail5: +fail7: EFSYS_PROBE(fail5); EFSYS_KMEM_FREE(enp->en_esip, ar_fcaps_size, ar_fcaps); +fail6: + EFSYS_PROBE(fail4); +fail5: + EFSYS_PROBE(fail5); + EFSYS_KMEM_FREE(enp->en_esip, or_fcaps_size, or_fcaps); fail4: EFSYS_PROBE(fail4); fail3: @@ -227,6 +330,8 @@ efx_mae_fini( EFSYS_KMEM_FREE(enp->en_esip, maep->em_action_rule_field_caps_size, maep->em_action_rule_field_caps); + EFSYS_KMEM_FREE(enp->en_esip, maep->em_outer_rule_field_caps_size, + maep->em_outer_rule_field_caps); EFSYS_KMEM_FREE(enp->en_esip, sizeof (*maep), maep); enp->en_maep = NULL; } @@ -711,6 +816,13 @@ efx_mae_match_spec_is_valid( const uint8_t *mvp; switch (spec->emms_type) { + case EFX_MAE_RULE_OUTER: + field_caps = maep->em_outer_rule_field_caps; + desc_setp = __efx_mae_outer_rule_mv_desc_set; + desc_set_nentries = + EFX_ARRAY_SIZE(__efx_mae_outer_rule_mv_desc_set); + mvp = spec->emms_mask_value_pairs.outer; + break; case EFX_MAE_RULE_ACTION: field_caps = maep->em_action_rule_field_caps; desc_setp = __efx_mae_action_rule_mv_desc_set; @@ -1190,6 +1302,14 @@ efx_mae_match_specs_class_cmp( efx_rc_t rc; switch (left->emms_type) { + case EFX_MAE_RULE_OUTER: + field_caps = maep->em_outer_rule_field_caps; + desc_setp = __efx_mae_outer_rule_mv_desc_set; + desc_set_nentries = + EFX_ARRAY_SIZE(__efx_mae_outer_rule_mv_desc_set); + mvpl = left->emms_mask_value_pairs.outer; + mvpr = right->emms_mask_value_pairs.outer; + break; case EFX_MAE_RULE_ACTION: field_caps = maep->em_action_rule_field_caps; desc_setp = __efx_mae_action_rule_mv_desc_set; -- 2.17.1