From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 475C7A04DD; Tue, 20 Oct 2020 11:33:56 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 43BF6FC6A; Tue, 20 Oct 2020 11:15:38 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 57670C81A for ; Tue, 20 Oct 2020 11:14:16 +0200 (CEST) Received: from mx1-us1.ppe-hosted.com (unknown [10.7.65.60]) by dispatch1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 2532360050 for ; Tue, 20 Oct 2020 09:14:16 +0000 (UTC) Received: from us4-mdac16-48.ut7.mdlocal (unknown [10.7.66.15]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTP id 245722009A for ; Tue, 20 Oct 2020 09:14:16 +0000 (UTC) X-Virus-Scanned: Proofpoint Essentials engine Received: from mx1-us1.ppe-hosted.com (unknown [10.7.66.34]) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id DD1D81C0057 for ; Tue, 20 Oct 2020 09:14:14 +0000 (UTC) Received: from webmail.solarflare.com (uk.solarflare.com [193.34.186.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us1.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 93185600053 for ; Tue, 20 Oct 2020 09:14:14 +0000 (UTC) Received: from ukex01.SolarFlarecom.com (10.17.10.4) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 20 Oct 2020 10:14:01 +0100 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ukex01.SolarFlarecom.com (10.17.10.4) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 20 Oct 2020 10:14:01 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id 09K9E1S5028520; Tue, 20 Oct 2020 10:14:01 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id 789AA1613A9; Tue, 20 Oct 2020 10:14:01 +0100 (BST) From: Andrew Rybchenko To: CC: Ivan Malov Date: Tue, 20 Oct 2020 10:13:29 +0100 Message-ID: <1603185222-14831-50-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603185222-14831-1-git-send-email-arybchenko@solarflare.com> References: <1603183709-23420-1-git-send-email-arybchenko@solarflare.com> <1603185222-14831-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.6.1012-25736.003 X-TM-AS-Result: No-0.972300-8.000000-10 X-TMASE-MatchedRID: U43vBdnEpjofKML5AJtfLS2416nc3bQleouvej40T4gd0WOKRkwsh3Io zGa69omdrdoLblq9S5oV+ztbPoSlM0jn8cIz0h4xHl2pJS1lPFvbODDlFP8GtiGD+Fp3vZHUiM6 fF5HaiokeiFQL2XCGlEbCbdi0X6BUxz6opuAAUJJX7UpJhGB2YqIik2/euMx1f8xg+JfAY9BNnt 9EGqgbbPCro3RI5LoRHbgNvtI8fLxfHIrW6stOkz5g6d8RSIIzovA/6ONsv0rmQJUUegCCexZKi SC+7/NsOPAJR2VDC9/c7RafwK18CoP+zEDQnRb6+ACG5oWJ7tICn5QffvZFle4utY8dkDDy5Bit m2A0oi+iMobsOo19soAy6p60ZV62fJ5/bZ6npdiujVRFkkVsmx8lAh96RVPPUNv5At92pCH3Qva JB5wFpXwsCPATzCTsd5f4wKG8PlXdyppfK383wBBrUiiKoDjaA9Lcdcpe5r9wZ/9f5Xj1/fDsnH BTQS9kyoRE4tv/7I7j/Qm+fSvAAma0vgPD7M1vQP8wh/06uR0= X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10-0.972300-8.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.6.1012-25736.003 X-MDID: 1603185255-Z9SuJfDkejCS X-PPE-DISP: 1603185255;Z9SuJfDkejCS Subject: [dpdk-dev] [PATCH v2 49/62] net/sfc: support flow item IPV4 in transfer rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ivan Malov Add support for this flow item to MAE-specific RTE flow implementation. Signed-off-by: Ivan Malov Signed-off-by: Andrew Rybchenko Reviewed-by: Andy Moreton --- doc/guides/nics/sfc_efx.rst | 3 + drivers/net/sfc/sfc_mae.c | 121 ++++++++++++++++++++++++++++++++++++ drivers/net/sfc/sfc_mae.h | 20 ++++++ 3 files changed, 144 insertions(+) diff --git a/doc/guides/nics/sfc_efx.rst b/doc/guides/nics/sfc_efx.rst index adee0cd670..e687e1cac3 100644 --- a/doc/guides/nics/sfc_efx.rst +++ b/doc/guides/nics/sfc_efx.rst @@ -202,6 +202,9 @@ Supported pattern items (***transfer*** rules): - VLAN (double-tagging is supported) +- IPV4 (source/destination addresses, IP transport protocol, + type of service, time to live) + Supported actions (***transfer*** rules): - OF_POP_VLAN diff --git a/drivers/net/sfc/sfc_mae.c b/drivers/net/sfc/sfc_mae.c index cc22fee6fe..d7c1cd784f 100644 --- a/drivers/net/sfc/sfc_mae.c +++ b/drivers/net/sfc/sfc_mae.c @@ -312,6 +312,7 @@ static int sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx, struct rte_flow_error *error) { + efx_mae_match_spec_t *efx_spec = ctx->match_spec_action; struct sfc_mae_pattern_data *pdata = &ctx->pattern_data; struct sfc_mae_ethertype *ethertypes = pdata->ethertypes; const rte_be16_t supported_tpids[] = { @@ -326,8 +327,19 @@ sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx, }; unsigned int nb_supported_tpids = RTE_DIM(supported_tpids); unsigned int ethertype_idx; + const uint8_t *valuep; + const uint8_t *maskp; int rc; + if (pdata->innermost_ethertype_restriction.mask != 0 && + pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) { + /* + * If a single item VLAN is followed by a L3 item, value + * of "type" in item ETH can't be a double-tagging TPID. + */ + nb_supported_tpids = 1; + } + /* * sfc_mae_rule_parse_item_vlan() has already made sure * that pdata->nb_vlan_tags does not exceed this figure. @@ -359,6 +371,21 @@ sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx, nb_supported_tpids = 1; } + if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) { + struct sfc_mae_ethertype *et = ðertypes[ethertype_idx]; + + if (et->mask == 0) { + et->mask = RTE_BE16(0xffff); + et->value = + pdata->innermost_ethertype_restriction.value; + } else if (et->mask != RTE_BE16(0xffff) || + et->value != + pdata->innermost_ethertype_restriction.value) { + rc = EINVAL; + goto fail; + } + } + /* * Now, when the number of VLAN tags is known, set fields * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first @@ -369,6 +396,16 @@ sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx, if (rc != 0) goto fail; + valuep = (const uint8_t *)&pdata->l3_next_proto_value; + maskp = (const uint8_t *)&pdata->l3_next_proto_mask; + rc = efx_mae_match_spec_field_set(efx_spec, EFX_MAE_FIELD_IP_PROTO, + sizeof(pdata->l3_next_proto_value), + valuep, + sizeof(pdata->l3_next_proto_mask), + maskp); + if (rc != 0) + goto fail; + return 0; fail: @@ -832,6 +869,83 @@ sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item, ctx_mae->match_spec_action, error); } +static const struct sfc_mae_field_locator flocs_ipv4[] = { + { + EFX_MAE_FIELD_SRC_IP4_BE, + RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr), + offsetof(struct rte_flow_item_ipv4, hdr.src_addr), + }, + { + EFX_MAE_FIELD_DST_IP4_BE, + RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr), + offsetof(struct rte_flow_item_ipv4, hdr.dst_addr), + }, + { + /* + * This locator is used only for building supported fields mask. + * The field is handled by sfc_mae_rule_process_pattern_data(). + */ + SFC_MAE_FIELD_HANDLING_DEFERRED, + RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id), + offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id), + }, + { + EFX_MAE_FIELD_IP_TOS, + RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, + hdr.type_of_service), + offsetof(struct rte_flow_item_ipv4, hdr.type_of_service), + }, + { + EFX_MAE_FIELD_IP_TTL, + RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live), + offsetof(struct rte_flow_item_ipv4, hdr.time_to_live), + }, +}; + +static int +sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item, + struct sfc_flow_parse_ctx *ctx, + struct rte_flow_error *error) +{ + rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4); + struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; + struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; + struct rte_flow_item_ipv4 supp_mask; + const uint8_t *spec = NULL; + const uint8_t *mask = NULL; + int rc; + + sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4), + &supp_mask, sizeof(supp_mask)); + + rc = sfc_flow_parse_init(item, + (const void **)&spec, (const void **)&mask, + (const void *)&supp_mask, + &rte_flow_item_ipv4_mask, + sizeof(struct rte_flow_item_ipv4), error); + if (rc != 0) + return rc; + + pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be; + pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff); + + if (spec != NULL) { + const struct rte_flow_item_ipv4 *item_spec; + const struct rte_flow_item_ipv4 *item_mask; + + item_spec = (const struct rte_flow_item_ipv4 *)spec; + item_mask = (const struct rte_flow_item_ipv4 *)mask; + + pdata->l3_next_proto_value = item_spec->hdr.next_proto_id; + pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id; + } else { + return 0; + } + + return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask, + ctx_mae->match_spec_action, error); +} + static const struct sfc_flow_item sfc_flow_items[] = { { .type = RTE_FLOW_ITEM_TYPE_PORT_ID, @@ -891,6 +1005,13 @@ static const struct sfc_flow_item sfc_flow_items[] = { .ctx_type = SFC_FLOW_PARSE_CTX_MAE, .parse = sfc_mae_rule_parse_item_vlan, }, + { + .type = RTE_FLOW_ITEM_TYPE_IPV4, + .prev_layer = SFC_FLOW_ITEM_L2, + .layer = SFC_FLOW_ITEM_L3, + .ctx_type = SFC_FLOW_PARSE_CTX_MAE, + .parse = sfc_mae_rule_parse_item_ipv4, + }, }; int diff --git a/drivers/net/sfc/sfc_mae.h b/drivers/net/sfc/sfc_mae.h index e4e8ab67a5..56be8bf917 100644 --- a/drivers/net/sfc/sfc_mae.h +++ b/drivers/net/sfc/sfc_mae.h @@ -90,6 +90,10 @@ struct sfc_mae_pattern_data { * values (0x88a8, 0x9100, 0x9200, 0x9300), and the outermost * VLAN item must have "inner_type" set to TPID value 0x8100. * + * - If a L2 item is followed by a L3 one, the former must + * indicate "type" ("inner_type") which corresponds to + * the protocol used in the L3 item, or 0x0000/0x0000. + * * In turn, mapping between RTE convention (above requirements) and * MAE fields is non-trivial. The following scheme indicates * which item EtherTypes go to which MAE fields in the case @@ -106,6 +110,22 @@ struct sfc_mae_pattern_data { */ struct sfc_mae_ethertype ethertypes[SFC_MAE_L2_MAX_NITEMS]; unsigned int nb_vlan_tags; + + /** + * L3 requirement for the innermost L2 item's "type" ("inner_type"). + * This contains one of: + * - 0x0800/0xffff: IPV4 + * - 0x0000/0x0000: no L3 item + */ + struct sfc_mae_ethertype innermost_ethertype_restriction; + + /** + * The following two fields keep track of L3 "proto" mask and value. + * The corresponding fields get filled in MAE match specification + * at the end of parsing. + */ + uint8_t l3_next_proto_value; + uint8_t l3_next_proto_mask; }; struct sfc_mae_parse_ctx { -- 2.17.1