From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CC648A04DD; Thu, 22 Oct 2020 16:08:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 500D1AA27; Thu, 22 Oct 2020 16:07:11 +0200 (CEST) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id D7F3E5A57 for ; Thu, 22 Oct 2020 16:07:00 +0200 (CEST) From: Bing Zhao To: viacheslavo@mellanox.com, matan@mellanox.com Cc: dev@dpdk.org, orika@nvidia.com, rasland@nvidia.com Date: Thu, 22 Oct 2020 22:06:37 +0800 Message-Id: <1603375597-430528-7-git-send-email-bingz@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1603375597-430528-1-git-send-email-bingz@nvidia.com> References: <1602166620-46303-1-git-send-email-bingz@nvidia.com> <1603375597-430528-1-git-send-email-bingz@nvidia.com> Subject: [dpdk-dev] [PATCH v2 6/6] net/mlx5: not split hairpin flow in explicit mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In the current implementation, the hairpin flow will be split into two flows implicitly if there is some action that only belongs to the TX part. A TX device flow will be inserted by the mlx5 PMD itself. In hairpin between two ports, the explicit TX flow mode will be the only one to be supported. It is not the appropriate behavior to insert a TX flow into another device implicitly. The application could create any flow as it likes and has full control of the user flows. Hairpin flows will have no difference from standard flows and the application can decide how to chain RX and TX flows together. Even in the single port hairpin, this explicit TX flow mode could also be supported. When checking if the hairpin needs to be split, just return if the hairpin queue is with "tx_explicit" attribute. Then in the following steps for validation and translation, the code path will be the same as that for standard flows. Signed-off-by: Bing Zhao --- drivers/net/mlx5/mlx5_flow.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index d7243a8..8a114a6 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -3261,6 +3261,7 @@ struct mlx5_flow_tunnel_info { const struct rte_flow_action_queue *queue; const struct rte_flow_action_rss *rss; const struct rte_flow_action_raw_encap *raw_encap; + const struct rte_eth_hairpin_conf *conf; if (!attr->ingress) return 0; @@ -3273,6 +3274,9 @@ struct mlx5_flow_tunnel_info { if (mlx5_rxq_get_type(dev, queue->index) != MLX5_RXQ_TYPE_HAIRPIN) return 0; + conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); + if (!!conf->tx_explicit) + return 0; queue_action = 1; action_n++; break; @@ -3283,6 +3287,9 @@ struct mlx5_flow_tunnel_info { if (mlx5_rxq_get_type(dev, rss->queue[0]) != MLX5_RXQ_TYPE_HAIRPIN) return 0; + conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); + if (conf != NULL && !!conf->tx_explicit) + return 0; queue_action = 1; action_n++; break; -- 1.8.3.1