From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
by inbox.dpdk.org (Postfix) with ESMTP id BD0A2A04B0;
Sat, 24 Oct 2020 01:08:43 +0200 (CEST)
Received: from [92.243.14.124] (localhost [127.0.0.1])
by dpdk.org (Postfix) with ESMTP id 0E02A6A44;
Sat, 24 Oct 2020 01:07:04 +0200 (CEST)
Received: from mga12.intel.com (mga12.intel.com [192.55.52.136])
by dpdk.org (Postfix) with ESMTP id D01F7677C
for <dev@dpdk.org>; Sat, 24 Oct 2020 01:06:53 +0200 (CEST)
IronPort-SDR: 3BhoqVelnA4maVpLFo/2g/+OHGs4ZVDr8ybNjOfI0Nv+HR1RSyWj5zM6OmNPBTg50fWYrfMZKH
8KxlhLzC0cKA==
X-IronPort-AV: E=McAfee;i="6000,8403,9783"; a="147031961"
X-IronPort-AV: E=Sophos;i="5.77,410,1596524400"; d="scan'208";a="147031961"
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from fmsmga005.fm.intel.com ([10.253.24.32])
by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;
23 Oct 2020 16:06:53 -0700
IronPort-SDR: MbpIMJWPbfwSLlMlqlomXwIjBIUvrjCOJ+brUNFJYJqOBhkbkDjSge8x3XKWS7KQoMbfewgVMT
ogyC/VqlHzFQ==
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.77,410,1596524400"; d="scan'208";a="524832867"
Received: from irvmail001.ir.intel.com ([163.33.26.43])
by fmsmga005.fm.intel.com with ESMTP; 23 Oct 2020 16:06:49 -0700
Received: from sivswdev09.ir.intel.com (sivswdev09.ir.intel.com
[10.237.217.48])
by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id
09NN6nA3016538; Sat, 24 Oct 2020 00:06:49 +0100
Received: from sivswdev09.ir.intel.com (localhost [127.0.0.1])
by sivswdev09.ir.intel.com with ESMTP id 09NN6nKA007404;
Sat, 24 Oct 2020 00:06:49 +0100
Received: (from lma25@localhost)
by sivswdev09.ir.intel.com with LOCAL id 09NN6nAP007400;
Sat, 24 Oct 2020 00:06:49 +0100
From: Liang Ma <liang.j.ma@intel.com>
To: dev@dpdk.org
Cc: anatoly.burakov@intel.com, viktorin@rehivetech.com, qi.z.zhang@intel.com,
ruifeng.wang@arm.com, beilei.xing@intel.com, jia.guo@intel.com,
qiming.yang@intel.com, haiyue.wang@intel.com,
bruce.richardson@intel.com, konstantin.ananyev@intel.com,
david.hunt@intel.com, jerinjacobk@gmail.com, nhorman@tuxdriver.com,
thomas@monjalon.net, timothy.mcdaniel@intel.com, gage.eads@intel.com,
drc@linux.vnet.ibm.com, Liang Ma <liang.j.ma@intel.com>
Date: Sat, 24 Oct 2020 00:06:28 +0100
Message-Id: <1603494392-7181-7-git-send-email-liang.j.ma@intel.com>
X-Mailer: git-send-email 1.7.7.4
In-Reply-To: <1603494392-7181-1-git-send-email-liang.j.ma@intel.com>
References: <n>
<1603494392-7181-1-git-send-email-liang.j.ma@intel.com>
In-Reply-To: <1603473432-11153-1-git-send-email-liang.j.ma@intel.com>
References: <1603473432-11153-1-git-send-email-liang.j.ma@intel.com>
Subject: [dpdk-dev] [PATCH v9 06/10] net/ixgbe: implement power management
API
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>
Implement support for the power management API by implementing a
`get_wake_addr` function that will return an address of an RX ring's
status bit.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
drivers/net/ixgbe/ixgbe_ethdev.c | 1 +
drivers/net/ixgbe/ixgbe_rxtx.c | 25 +++++++++++++++++++++++++
drivers/net/ixgbe/ixgbe_rxtx.h | 2 ++
3 files changed, 28 insertions(+)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 00101c2eec..fcc4026372 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -588,6 +588,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.udp_tunnel_port_del = ixgbe_dev_udp_tunnel_port_del,
.tm_ops_get = ixgbe_tm_ops_get,
.tx_done_cleanup = ixgbe_dev_tx_done_cleanup,
+ .get_wake_addr = ixgbe_get_wake_addr,
};
/*
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d1d3baff90..096dff37ba 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1367,6 +1367,31 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+int ixgbe_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr,
+ uint64_t *expected, uint64_t *mask, uint8_t *data_sz)
+{
+ volatile union ixgbe_adv_rx_desc *rxdp;
+ struct ixgbe_rx_queue *rxq = rx_queue;
+ uint16_t desc;
+
+ desc = rxq->rx_tail;
+ rxdp = &rxq->rx_ring[desc];
+ /* watch for changes in status bit */
+ *tail_desc_addr = &rxdp->wb.upper.status_error;
+
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ *expected = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ *mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+
+ /* the registers are 32-bit */
+ *data_sz = 4;
+
+ return 0;
+}
+
/* @note: fix ixgbe_dev_supported_ptypes_get() if any change here. */
static inline uint32_t
ixgbe_rxd_pkt_info_to_pkt_type(uint32_t pkt_info, uint16_t ptype_mask)
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h
index 6d2f7c9da3..1ef0b05e66 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.h
+++ b/drivers/net/ixgbe/ixgbe_rxtx.h
@@ -299,5 +299,7 @@ uint64_t ixgbe_get_tx_port_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_rx_queue_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev);
uint64_t ixgbe_get_tx_queue_offloads(struct rte_eth_dev *dev);
+int ixgbe_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr,
+ uint64_t *expected, uint64_t *mask, uint8_t *data_sz);
#endif /* _IXGBE_RXTX_H_ */
--
2.17.1