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From: Bing Zhao <bingz@nvidia.com>
To: viacheslavo@mellanox.com, matan@mellanox.com
Cc: dev@dpdk.org, orika@nvidia.com, rasland@nvidia.com, andreyv@nvidia.com
Subject: [dpdk-dev] [PATCH] net/mlx5: fix bit field compiling error
Date: Tue, 27 Oct 2020 01:24:45 +0800
Message-ID: <1603733085-271968-1-git-send-email-bingz@nvidia.com> (raw)

Some old compilers and old specification will not support bit field
with other types except integer or unsigned integer.
Since the next and previous items are 64b and/or 32b aligned, bit
field with "unsigned char" type will not save any space and the
compiler will complain.
Changing it to "unsigned int" type bit field will solve the issue.

Fixes: f711b60d400b ("net/mlx5: modify hash Rx queue objects")
Cc: andreyv@nvidia.com

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 drivers/net/mlx5/mlx5.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index c537af9..e5640c1 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -733,7 +733,7 @@ struct mlx5_ind_table_obj {
 struct mlx5_hrxq {
 	ILIST_ENTRY(uint32_t)next; /* Index to the next element. */
 	rte_atomic32_t refcnt; /* Reference counter. */
-	uint8_t shared:1; /* This object used in shared action. */
+	uint32_t shared:1; /* This object used in shared action. */
 	struct mlx5_ind_table_obj *ind_table; /* Indirection table. */
 	RTE_STD_C11
 	union {
-- 
1.8.3.1


             reply	other threads:[~2020-10-26 17:24 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-26 17:24 Bing Zhao [this message]
2020-10-26 18:07 ` Raslan Darawsheh
2020-10-29 14:28   ` Ferruh Yigit
2020-11-01  7:36     ` Raslan Darawsheh

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