From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 16764A04B5; Tue, 27 Oct 2020 16:00:29 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 498A06966; Tue, 27 Oct 2020 15:59:39 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8B4945A8C for ; Tue, 27 Oct 2020 15:59:33 +0100 (CET) IronPort-SDR: +oESneGXnuRnX32/Spo4PxGlI/1BQzCW9FTmfXfJHu5EP/OZjDlDbt9aBvMVLAiKrutGsEDzAk UXJR1AlCLIsg== X-IronPort-AV: E=McAfee;i="6000,8403,9786"; a="185839905" X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="185839905" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Oct 2020 07:59:32 -0700 IronPort-SDR: Wyotn1pW2NprgklNpqfm7mQYygjZpfvRkQFqAGh6vriT6mGkZ5NW7wLVMbh5h09oazPUO9EH3g /a2edXI0iqnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,424,1596524400"; d="scan'208";a="394507268" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga001.jf.intel.com with ESMTP; 27 Oct 2020 07:59:28 -0700 Received: from sivswdev09.ir.intel.com (sivswdev09.ir.intel.com [10.237.217.48]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id 09RExRok015670; Tue, 27 Oct 2020 14:59:27 GMT Received: from sivswdev09.ir.intel.com (localhost [127.0.0.1]) by sivswdev09.ir.intel.com with ESMTP id 09RExRAw022603; Tue, 27 Oct 2020 14:59:27 GMT Received: (from lma25@localhost) by sivswdev09.ir.intel.com with LOCAL id 09RExRSA022599; Tue, 27 Oct 2020 14:59:27 GMT From: Liang Ma To: dev@dpdk.org Cc: ruifeng.wang@arm.com, haiyue.wang@intel.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, david.hunt@intel.com, jerinjacobk@gmail.com, nhorman@tuxdriver.com, thomas@monjalon.net, timothy.mcdaniel@intel.com, gage.eads@intel.com, mw@semihalf.com, gtzalik@amazon.com, ajit.khaparde@broadcom.com, hkalra@marvell.com, johndale@cisco.com, xavier.huwei@huawei.com, xuanziyang2@huawei.com, matan@nvidia.com, yongwang@vmware.com, Anatoly Burakov , Jerin Jacob , Jan Viktorin , David Christensen , Ray Kinsella Date: Tue, 27 Oct 2020 14:59:03 +0000 Message-Id: <1603810749-22285-4-git-send-email-liang.j.ma@intel.com> X-Mailer: git-send-email 1.7.7.4 In-Reply-To: <1603810749-22285-1-git-send-email-liang.j.ma@intel.com> References: <1603810749-22285-1-git-send-email-liang.j.ma@intel.com> In-Reply-To: <1603494392-7181-1-git-send-email-liang.j.ma@intel.com> References: <1603494392-7181-1-git-send-email-liang.j.ma@intel.com> Subject: [dpdk-dev] [PATCH v10 3/9] eal: add intrinsics support check infrastructure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, it is not possible to check support for intrinsics that are platform-specific, cannot be abstracted in a generic way, or do not have support on all architectures. The CPUID flags can be used to some extent, but they are only defined for their platform, while intrinsics will be available to all code as they are in generic headers. This patch introduces infrastructure to check support for certain platform-specific intrinsics, and adds support for checking support for IA power management-related intrinsics for UMWAIT/UMONITOR and TPAUSE. Signed-off-by: Anatoly Burakov Signed-off-by: Liang Ma Acked-by: David Christensen Acked-by: Jerin Jacob Acked-by: Ruifeng Wang Acked-by: Ray Kinsella -- Notes: v8: - Rename eal version.map v6: - Fix the comments --- lib/librte_eal/arm/rte_cpuflags.c | 6 +++++ lib/librte_eal/include/generic/rte_cpuflags.h | 26 +++++++++++++++++++ .../include/generic/rte_power_intrinsics.h | 12 +++++++++ lib/librte_eal/ppc/rte_cpuflags.c | 7 +++++ lib/librte_eal/version.map | 1 + lib/librte_eal/x86/rte_cpuflags.c | 12 +++++++++ 6 files changed, 64 insertions(+) diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c index 7b257b7873..e3a53bcece 100644 --- a/lib/librte_eal/arm/rte_cpuflags.c +++ b/lib/librte_eal/arm/rte_cpuflags.c @@ -151,3 +151,9 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) return NULL; return rte_cpu_feature_table[feature].name; } + +void +rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics) +{ + memset(intrinsics, 0, sizeof(*intrinsics)); +} diff --git a/lib/librte_eal/include/generic/rte_cpuflags.h b/lib/librte_eal/include/generic/rte_cpuflags.h index 872f0ebe3e..28a5aecde8 100644 --- a/lib/librte_eal/include/generic/rte_cpuflags.h +++ b/lib/librte_eal/include/generic/rte_cpuflags.h @@ -13,6 +13,32 @@ #include "rte_common.h" #include +#include + +/** + * Structure used to describe platform-specific intrinsics that may or may not + * be supported at runtime. + */ +struct rte_cpu_intrinsics { + uint32_t power_monitor : 1; + /**< indicates support for rte_power_monitor function */ + uint32_t power_pause : 1; + /**< indicates support for rte_power_pause function */ +}; + +/** + * @warning + * @b EXPERIMENTAL: this API may change without prior notice + * + * Check CPU support for various intrinsics at runtime. + * + * @param intrinsics + * Pointer to a structure to be filled. + */ +__rte_experimental +void +rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics); + /** * Enumeration of all CPU features supported */ diff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/librte_eal/include/generic/rte_power_intrinsics.h index fb897d9060..03a326f076 100644 --- a/lib/librte_eal/include/generic/rte_power_intrinsics.h +++ b/lib/librte_eal/include/generic/rte_power_intrinsics.h @@ -32,6 +32,10 @@ * checked against the expected value, and if they match, the entering of * optimized power state may be aborted. * + * @warning It is responsibility of the user to check if this function is + * supported at runtime using `rte_cpu_get_features()` API call. Failing to do + * so may result in an illegal CPU instruction error. + * * @param p * Address to monitor for changes. * @param expected_value @@ -69,6 +73,10 @@ static inline void rte_power_monitor(const volatile void *p, * This call will also lock a spinlock on entering sleep, and release it on * waking up the CPU. * + * @warning It is responsibility of the user to check if this function is + * supported at runtime using `rte_cpu_get_features()` API call. Failing to do + * so may result in an illegal CPU instruction error. + * * @param p * Address to monitor for changes. * @param expected_value @@ -101,6 +109,10 @@ static inline void rte_power_monitor_sync(const volatile void *p, * Enter an architecture-defined optimized power state until a certain TSC * timestamp is reached. * + * @warning It is responsibility of the user to check if this function is + * supported at runtime using `rte_cpu_get_features()` API call. Failing to do + * so may result in an illegal CPU instruction error. + * * @param tsc_timestamp * Maximum TSC timestamp to wait for. Note that the wait behavior is * architecture-dependent. diff --git a/lib/librte_eal/ppc/rte_cpuflags.c b/lib/librte_eal/ppc/rte_cpuflags.c index 3bb7563ce9..61db5c216d 100644 --- a/lib/librte_eal/ppc/rte_cpuflags.c +++ b/lib/librte_eal/ppc/rte_cpuflags.c @@ -8,6 +8,7 @@ #include #include #include +#include #include /* Symbolic values for the entries in the auxiliary table */ @@ -108,3 +109,9 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) return NULL; return rte_cpu_feature_table[feature].name; } + +void +rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics) +{ + memset(intrinsics, 0, sizeof(*intrinsics)); +} diff --git a/lib/librte_eal/version.map b/lib/librte_eal/version.map index c23ff57ce6..269cdccfd3 100644 --- a/lib/librte_eal/version.map +++ b/lib/librte_eal/version.map @@ -402,6 +402,7 @@ EXPERIMENTAL { rte_service_lcore_may_be_active; rte_vect_get_max_simd_bitwidth; rte_vect_set_max_simd_bitwidth; + rte_cpu_get_intrinsics_support; }; INTERNAL { diff --git a/lib/librte_eal/x86/rte_cpuflags.c b/lib/librte_eal/x86/rte_cpuflags.c index 0325c4b93b..a96312ff7f 100644 --- a/lib/librte_eal/x86/rte_cpuflags.c +++ b/lib/librte_eal/x86/rte_cpuflags.c @@ -7,6 +7,7 @@ #include #include #include +#include #include "rte_cpuid.h" @@ -179,3 +180,14 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature) return NULL; return rte_cpu_feature_table[feature].name; } + +void +rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics) +{ + memset(intrinsics, 0, sizeof(*intrinsics)); + + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_WAITPKG)) { + intrinsics->power_monitor = 1; + intrinsics->power_pause = 1; + } +} -- 2.17.1