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* [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags
@ 2020-10-28 12:23 Bing Zhao
  2020-10-30 10:10 ` Ferruh Yigit
  0 siblings, 1 reply; 3+ messages in thread
From: Bing Zhao @ 2020-10-28 12:23 UTC (permalink / raw)
  To: viacheslavo, matan, orika; +Cc: dev, rasland

In order to synchronize the flow steering cache with hardware in DR
mode, the new function is introduced. The function needs to use both
flags of "MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW/HW", or else some actions
and rules may get stuck in the work queue.

And in some old OS release with inbox driver, the enum used in the
function is not introduced yet. To resolve this, a local defined
macro is introduced. Then in Verbs mode, it will still do nothing.
In DV mode, the glue layer will return the unsupport error.

Fixes: 2e303780c17f ("net/mlx5: add flow sync API")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 2cf15f0..967bf71 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -8179,6 +8179,13 @@ int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
 	return err;
 }
 
+#ifndef HAVE_MLX5DV_DR
+#define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
+#else
+#define MLX5_DOMAIN_SYNC_FLOW \
+	(MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
+#endif
+
 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
 {
 	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
@@ -8187,7 +8194,7 @@ int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
 	struct rte_flow_attr attr = { .transfer = 0 };
 
 	fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
-	ret = fops->sync_domain(dev, domains, MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW);
+	ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
 	if (ret > 0)
 		ret = -ret;
 	return ret;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags
  2020-10-28 12:23 [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags Bing Zhao
@ 2020-10-30 10:10 ` Ferruh Yigit
  2020-10-30 11:05   ` Bing Zhao
  0 siblings, 1 reply; 3+ messages in thread
From: Ferruh Yigit @ 2020-10-30 10:10 UTC (permalink / raw)
  To: Bing Zhao, viacheslavo, matan, orika; +Cc: dev, rasland

On 10/28/2020 12:23 PM, Bing Zhao wrote:
> In order to synchronize the flow steering cache with hardware in DR
> mode, the new function is introduced. The function needs to use both
> flags of "MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW/HW", or else some actions
> and rules may get stuck in the work queue.
> 
> And in some old OS release with inbox driver, the enum used in the
> function is not introduced yet. To resolve this, a local defined
> macro is introduced. Then in Verbs mode, it will still do nothing.
> In DV mode, the glue layer will return the unsupport error.
> 
> Fixes: 2e303780c17f ("net/mlx5: add flow sync API")
> 
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

Squashed into relevant commit in next-net, thanks.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags
  2020-10-30 10:10 ` Ferruh Yigit
@ 2020-10-30 11:05   ` Bing Zhao
  0 siblings, 0 replies; 3+ messages in thread
From: Bing Zhao @ 2020-10-30 11:05 UTC (permalink / raw)
  To: Ferruh Yigit, Slava Ovsiienko, Matan Azrad, Ori Kam; +Cc: dev, Raslan Darawsheh

Thanks for your help, Ferruh.

BR. Bing

> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: Friday, October 30, 2020 6:10 PM
> To: Bing Zhao <bingz@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>; Ori Kam
> <orika@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags
> 
> External email: Use caution opening links or attachments
> 
> 
> On 10/28/2020 12:23 PM, Bing Zhao wrote:
> > In order to synchronize the flow steering cache with hardware in
> DR
> > mode, the new function is introduced. The function needs to use
> both
> > flags of "MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW/HW", or else some actions
> and
> > rules may get stuck in the work queue.
> >
> > And in some old OS release with inbox driver, the enum used in the
> > function is not introduced yet. To resolve this, a local defined
> macro
> > is introduced. Then in Verbs mode, it will still do nothing.
> > In DV mode, the glue layer will return the unsupport error.
> >
> > Fixes: 2e303780c17f ("net/mlx5: add flow sync API")
> >
> > Signed-off-by: Bing Zhao <bingz@nvidia.com>
> > Acked-by: Ori Kam <orika@nvidia.com>
> > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> 
> Squashed into relevant commit in next-net, thanks.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2020-10-30 11:05 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-10-28 12:23 [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags Bing Zhao
2020-10-30 10:10 ` Ferruh Yigit
2020-10-30 11:05   ` Bing Zhao

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