From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 63F75A04DD; Wed, 28 Oct 2020 13:24:27 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id ECF66CA59; Wed, 28 Oct 2020 13:24:00 +0100 (CET) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id 46BB3CA36 for ; Wed, 28 Oct 2020 13:23:59 +0100 (CET) From: Bing Zhao To: viacheslavo@nvidia.com, matan@nvidia.com, orika@nvidia.com Cc: dev@dpdk.org, rasland@nvidia.com Date: Wed, 28 Oct 2020 20:23:52 +0800 Message-Id: <1603887832-52852-1-git-send-email-bingz@nvidia.com> X-Mailer: git-send-email 1.8.3.1 Subject: [dpdk-dev] [PATCH] net/mlx5: fix the flow sync flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In order to synchronize the flow steering cache with hardware in DR mode, the new function is introduced. The function needs to use both flags of "MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW/HW", or else some actions and rules may get stuck in the work queue. And in some old OS release with inbox driver, the enum used in the function is not introduced yet. To resolve this, a local defined macro is introduced. Then in Verbs mode, it will still do nothing. In DV mode, the glue layer will return the unsupport error. Fixes: 2e303780c17f ("net/mlx5: add flow sync API") Signed-off-by: Bing Zhao Acked-by: Ori Kam Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 2cf15f0..967bf71 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -8179,6 +8179,13 @@ int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) return err; } +#ifndef HAVE_MLX5DV_DR +#define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) +#else +#define MLX5_DOMAIN_SYNC_FLOW \ + (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) +#endif + int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) { struct rte_eth_dev *dev = &rte_eth_devices[port_id]; @@ -8187,7 +8194,7 @@ int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) struct rte_flow_attr attr = { .transfer = 0 }; fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); - ret = fops->sync_domain(dev, domains, MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW); + ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); if (ret > 0) ret = -ret; return ret; -- 1.8.3.1