From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7B1BEA09FF; Wed, 6 Jan 2021 17:40:14 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EB47A140D64; Wed, 6 Jan 2021 17:40:13 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id 9A7A840FA7 for ; Wed, 6 Jan 2021 17:40:11 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@nvidia.com) with SMTP; 6 Jan 2021 18:40:10 +0200 Received: from nvidia.com (pegasus05.mtr.labs.mlnx [10.210.16.100]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 106Ge96e017829; Wed, 6 Jan 2021 18:40:09 +0200 From: Xueming Li To: Viacheslav Ovsiienko , Shahaf Shuler , Matan Azrad Cc: dev@dpdk.org, xuemingl@nvidia.com, Asaf Penso Date: Wed, 6 Jan 2021 16:39:58 +0000 Message-Id: <1609951199-24794-4-git-send-email-xuemingl@nvidia.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1609951199-24794-1-git-send-email-xuemingl@nvidia.com> References: <1609951199-24794-1-git-send-email-xuemingl@nvidia.com> In-Reply-To: <1608303356-13089-2-git-send-email-xuemingl@nvidia.com> References: <1608303356-13089-2-git-send-email-xuemingl@nvidia.com> Subject: [dpdk-dev] [PATCH v2 3/4] net/mlx5: revert setting representor to first PF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Representors on second PF are being probed by devargs: ,representor=pf1vf No need to save primary PF port ID and lookup when probing sibling ports, revert patch [1] [1]: commit e6818853c022 ("net/mlx5: set representor to first PF in bonding mode") Signed-off-by: Xueming Li --- drivers/net/mlx5/linux/mlx5_os.c | 20 ++------------------ drivers/net/mlx5/mlx5.c | 1 - drivers/net/mlx5/mlx5.h | 1 - 3 files changed, 2 insertions(+), 20 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 6f667dd747..1209bfed5b 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -817,13 +817,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, rte_errno = ENOMEM; return NULL; } - priv = eth_dev->data->dev_private; - if (priv->sh->bond_dev != UINT16_MAX) - /* For bonding port, use primary PCI device. */ - eth_dev->device = - rte_eth_devices[priv->sh->bond_dev].device; - else - eth_dev->device = dpdk_dev; + eth_dev->device = dpdk_dev; eth_dev->dev_ops = &mlx5_dev_sec_ops; eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status; eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status; @@ -1451,17 +1445,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, eth_dev->data->dev_private = priv; priv->dev_data = eth_dev->data; eth_dev->data->mac_addrs = priv->mac; - if (spawn->pf_bond < 0) { - eth_dev->device = dpdk_dev; - } else { - /* Use primary bond PCI as device. */ - if (sh->bond_dev == UINT16_MAX) { - sh->bond_dev = eth_dev->data->port_id; - eth_dev->device = dpdk_dev; - } else { - eth_dev->device = rte_eth_devices[sh->bond_dev].device; - } - } + eth_dev->device = dpdk_dev; eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; /* Configure the first MAC address by default. */ if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) { diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 023ef50a77..628587faac 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -917,7 +917,6 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn, goto error; } sh->refcnt = 1; - sh->bond_dev = UINT16_MAX; sh->max_port = spawn->max_port; strncpy(sh->ibdev_name, mlx5_os_get_ctx_device_name(sh->ctx), sizeof(sh->ibdev_name) - 1); diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 41034f5d19..a77a1600d5 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -692,7 +692,6 @@ struct mlx5_flex_parser_profiles { struct mlx5_dev_ctx_shared { LIST_ENTRY(mlx5_dev_ctx_shared) next; uint32_t refcnt; - uint16_t bond_dev; /* Bond primary device id. */ uint32_t devx:1; /* Opened with DV. */ uint32_t flow_hit_aso_en:1; /* Flow Hit ASO is supported. */ uint32_t eqn; /* Event Queue number. */ -- 2.25.1