From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9E059A0562; Thu, 15 Apr 2021 03:52:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 895E0161E93; Thu, 15 Apr 2021 03:51:00 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id 1AD84161E33 for ; Thu, 15 Apr 2021 03:50:42 +0200 (CEST) IronPort-SDR: 6yWuMnI877Kt5wUBtgmo/DlWA3QQ6rmYC+4LGghmNOJN3GS6M7UQTvTWu2QvMqZIEh41Hb66a2 JgMfofX+Un3A== X-IronPort-AV: E=McAfee;i="6200,9189,9954"; a="215272819" X-IronPort-AV: E=Sophos;i="5.82,223,1613462400"; d="scan'208";a="215272819" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2021 18:50:42 -0700 IronPort-SDR: UAcRPOIDL6YEgNRYycwQpqmbln75o2IPik1VT3Ztx7n8ZER7rUhi5KvFvVHbHcnaMdKQo4Ho2s 11fZ/iQTk08Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,223,1613462400"; d="scan'208";a="382569886" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga003.jf.intel.com with ESMTP; 14 Apr 2021 18:50:41 -0700 From: Timothy McDaniel To: Cc: dev@dpdk.org, erik.g.carrillo@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com, thomas@monjalon.net Date: Wed, 14 Apr 2021 20:49:11 -0500 Message-Id: <1618451359-20693-20-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1618451359-20693-1-git-send-email-timothy.mcdaniel@intel.com> References: <20210316221857.2254-2-timothy.mcdaniel@intel.com> <1618451359-20693-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH v4 19/27] event/dlb2: add v2.5 sequence number management X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Update the low level HW functions that perform the sequence number management functions. These include getting a groups number of sequence numbers per queue, managing in-use slots, getting the current occupancy, and setting sequence numbers for a group. The logic is very similar to what was done for v2.0, but the new combined register map for v2.0 and v2.5 uses new register names and bit names. Additionally, new register access macros are used so that the code can perform the correct action, based on the hardware. Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/pf/base/dlb2_resource.c | 67 ----------- drivers/event/dlb2/pf/base/dlb2_resource.h | 4 +- .../event/dlb2/pf/base/dlb2_resource_new.c | 105 ++++++++++++++++++ 3 files changed, 107 insertions(+), 69 deletions(-) diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c b/drivers/event/dlb2/pf/base/dlb2_resource.c index d53cce643..e8a9d52f6 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource.c +++ b/drivers/event/dlb2/pf/base/dlb2_resource.c @@ -32,70 +32,3 @@ #define DLB2_FUNC_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \ DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, func_list, it, it_tmp) -int dlb2_get_group_sequence_numbers(struct dlb2_hw *hw, unsigned int group_id) -{ - if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) - return -EINVAL; - - return hw->rsrcs.sn_groups[group_id].sequence_numbers_per_queue; -} - -int dlb2_get_group_sequence_number_occupancy(struct dlb2_hw *hw, - unsigned int group_id) -{ - if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) - return -EINVAL; - - return dlb2_sn_group_used_slots(&hw->rsrcs.sn_groups[group_id]); -} - -static void dlb2_log_set_group_sequence_numbers(struct dlb2_hw *hw, - unsigned int group_id, - unsigned long val) -{ - DLB2_HW_DBG(hw, "DLB2 set group sequence numbers:\n"); - DLB2_HW_DBG(hw, "\tGroup ID: %u\n", group_id); - DLB2_HW_DBG(hw, "\tValue: %lu\n", val); -} - -int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw, - unsigned int group_id, - unsigned long val) -{ - u32 valid_allocations[] = {64, 128, 256, 512, 1024}; - union dlb2_ro_pipe_grp_sn_mode r0 = { {0} }; - struct dlb2_sn_group *group; - int mode; - - if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) - return -EINVAL; - - group = &hw->rsrcs.sn_groups[group_id]; - - /* - * Once the first load-balanced queue using an SN group is configured, - * the group cannot be changed. - */ - if (group->slot_use_bitmap != 0) - return -EPERM; - - for (mode = 0; mode < DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES; mode++) - if (val == valid_allocations[mode]) - break; - - if (mode == DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES) - return -EINVAL; - - group->mode = mode; - group->sequence_numbers_per_queue = val; - - r0.field.sn_mode_0 = hw->rsrcs.sn_groups[0].mode; - r0.field.sn_mode_1 = hw->rsrcs.sn_groups[1].mode; - - DLB2_CSR_WR(hw, DLB2_RO_PIPE_GRP_SN_MODE, r0.val); - - dlb2_log_set_group_sequence_numbers(hw, group_id, val); - - return 0; -} - diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.h b/drivers/event/dlb2/pf/base/dlb2_resource.h index 2e13193bb..00a0b6b57 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource.h +++ b/drivers/event/dlb2/pf/base/dlb2_resource.h @@ -792,8 +792,8 @@ int dlb2_get_group_sequence_number_occupancy(struct dlb2_hw *hw, * ordered queue is configured. */ int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw, - unsigned int group_id, - unsigned long val); + u32 group_id, + u32 val); /** * dlb2_reset_domain() - reset a scheduling domain diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c b/drivers/event/dlb2/pf/base/dlb2_resource_new.c index 0f18bfeff..927b65568 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource_new.c +++ b/drivers/event/dlb2/pf/base/dlb2_resource_new.c @@ -6128,3 +6128,108 @@ void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw *hw) DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, ctrl); } +/** + * dlb2_get_group_sequence_numbers() - return a group's number of SNs per queue + * @hw: dlb2_hw handle for a particular device. + * @group_id: sequence number group ID. + * + * This function returns the configured number of sequence numbers per queue + * for the specified group. + * + * Return: + * Returns -EINVAL if group_id is invalid, else the group's SNs per queue. + */ +int dlb2_get_group_sequence_numbers(struct dlb2_hw *hw, u32 group_id) +{ + if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) + return -EINVAL; + + return hw->rsrcs.sn_groups[group_id].sequence_numbers_per_queue; +} + +/** + * dlb2_get_group_sequence_number_occupancy() - return a group's in-use slots + * @hw: dlb2_hw handle for a particular device. + * @group_id: sequence number group ID. + * + * This function returns the group's number of in-use slots (i.e. load-balanced + * queues using the specified group). + * + * Return: + * Returns -EINVAL if group_id is invalid, else the group's SNs per queue. + */ +int dlb2_get_group_sequence_number_occupancy(struct dlb2_hw *hw, u32 group_id) +{ + if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) + return -EINVAL; + + return dlb2_sn_group_used_slots(&hw->rsrcs.sn_groups[group_id]); +} + +static void dlb2_log_set_group_sequence_numbers(struct dlb2_hw *hw, + u32 group_id, + u32 val) +{ + DLB2_HW_DBG(hw, "DLB2 set group sequence numbers:\n"); + DLB2_HW_DBG(hw, "\tGroup ID: %u\n", group_id); + DLB2_HW_DBG(hw, "\tValue: %u\n", val); +} + +/** + * dlb2_set_group_sequence_numbers() - assign a group's number of SNs per queue + * @hw: dlb2_hw handle for a particular device. + * @group_id: sequence number group ID. + * @val: requested amount of sequence numbers per queue. + * + * This function configures the group's number of sequence numbers per queue. + * val can be a power-of-two between 32 and 1024, inclusive. This setting can + * be configured until the first ordered load-balanced queue is configured, at + * which point the configuration is locked. + * + * Return: + * Returns 0 upon success; -EINVAL if group_id or val is invalid, -EPERM if an + * ordered queue is configured. + */ +int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw, + u32 group_id, + u32 val) +{ + const u32 valid_allocations[] = {64, 128, 256, 512, 1024}; + struct dlb2_sn_group *group; + u32 sn_mode = 0; + int mode; + + if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS) + return -EINVAL; + + group = &hw->rsrcs.sn_groups[group_id]; + + /* + * Once the first load-balanced queue using an SN group is configured, + * the group cannot be changed. + */ + if (group->slot_use_bitmap != 0) + return -EPERM; + + for (mode = 0; mode < DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES; mode++) + if (val == valid_allocations[mode]) + break; + + if (mode == DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES) + return -EINVAL; + + group->mode = mode; + group->sequence_numbers_per_queue = val; + + DLB2_BITS_SET(sn_mode, hw->rsrcs.sn_groups[0].mode, + DLB2_RO_GRP_SN_MODE_SN_MODE_0); + DLB2_BITS_SET(sn_mode, hw->rsrcs.sn_groups[1].mode, + DLB2_RO_GRP_SN_MODE_SN_MODE_1); + + DLB2_CSR_WR(hw, DLB2_RO_GRP_SN_MODE(hw->ver), sn_mode); + + dlb2_log_set_group_sequence_numbers(hw, group_id, val); + + return 0; +} + -- 2.23.0