From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7ABE1A0524; Wed, 2 Jun 2021 18:44:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5C557410F9; Wed, 2 Jun 2021 18:44:23 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 75D58410E5 for ; Wed, 2 Jun 2021 18:44:21 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 152GaseW016164; Wed, 2 Jun 2021 09:44:20 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=BTNYk/9sP8AaTgMIeHMKj870CB2nhOFpNZlCFMGU4Rk=; b=ZnLt/5F3VVGl6gbR1sOKs5HyOcj6kiTITaFBW3tGdCzjXRzR/A4wdwfb/QtmTjlfjQAi 6p/HpqzmGtoCWzpIn3EZ1ujzfNjseCYLV1UorSOD3fxLOMTwySl735Z5fIXA6ZnHqbri iyrEIgiMYiYjb9BV7OkpPZaZmpDaNQ0HZFGrYHQ8yhRi5WPR2RqTlHOS9dAzRSbLOLIC nZWzkc8FwWVSab9uPyatMDOtR0/UYuPUHHvjO6h/o3/BF7bR6q7kSKmQ1GM4btMk/hMm +4W+iKd+S7NNyntoqd9CXwU90KbHg0giAgCyshZb4Y0cEMQsaqKat4+ej8b6/Z+K5c/4 QA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com with ESMTP id 38wug73v2u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 02 Jun 2021 09:44:20 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Jun 2021 09:44:18 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Jun 2021 09:44:18 -0700 Received: from HY-LT1002.marvell.com (unknown [10.193.70.1]) by maili.marvell.com (Postfix) with ESMTP id 667EC3F7040; Wed, 2 Jun 2021 09:44:13 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Ankur Dwivedi , Jerin Jacob , Tejasree Kondoj , , Anoob Joseph , Archana Muniganti Date: Wed, 2 Jun 2021 22:13:24 +0530 Message-ID: <1622652221-22732-4-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1622652221-22732-1-git-send-email-anoobj@marvell.com> References: <1622652221-22732-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: xFJbB5NIcylZPLZ3vq-ZesjQ3btdBe6w X-Proofpoint-GUID: xFJbB5NIcylZPLZ3vq-ZesjQ3btdBe6w X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-02_09:2021-06-02, 2021-06-02 signatures=0 Subject: [dpdk-dev] [PATCH 03/20] crypto/cnxk: add device control ops X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ankur Dwivedi Add ops for - dev_configure() - dev_start() - dev_stop() - dev_close() - dev_infos_get() Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 21 +++++++-- drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 21 +++++++-- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 77 +++++++++++++++++++++++++++++++ drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 25 ++++++++++ drivers/crypto/cnxk/meson.build | 1 + 5 files changed, 135 insertions(+), 10 deletions(-) create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.h diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index 6f80f74..b0eccb3 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -7,14 +7,25 @@ #include "cn10k_cryptodev.h" #include "cn10k_cryptodev_ops.h" +#include "cnxk_cryptodev_ops.h" + +static void +cn10k_cpt_dev_info_get(struct rte_cryptodev *dev, + struct rte_cryptodev_info *info) +{ + if (info != NULL) { + cnxk_cpt_dev_info_get(dev, info); + info->driver_id = cn10k_cryptodev_driver_id; + } +} struct rte_cryptodev_ops cn10k_cpt_ops = { /* Device control ops */ - .dev_configure = NULL, - .dev_start = NULL, - .dev_stop = NULL, - .dev_close = NULL, - .dev_infos_get = NULL, + .dev_configure = cnxk_cpt_dev_config, + .dev_start = cnxk_cpt_dev_start, + .dev_stop = cnxk_cpt_dev_stop, + .dev_close = cnxk_cpt_dev_close, + .dev_infos_get = cn10k_cpt_dev_info_get, .stats_get = NULL, .stats_reset = NULL, diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c index 51f9845..acfb071 100644 --- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c @@ -7,14 +7,25 @@ #include "cn9k_cryptodev.h" #include "cn9k_cryptodev_ops.h" +#include "cnxk_cryptodev_ops.h" + +static void +cn9k_cpt_dev_info_get(struct rte_cryptodev *dev, + struct rte_cryptodev_info *info) +{ + if (info != NULL) { + cnxk_cpt_dev_info_get(dev, info); + info->driver_id = cn9k_cryptodev_driver_id; + } +} struct rte_cryptodev_ops cn9k_cpt_ops = { /* Device control ops */ - .dev_configure = NULL, - .dev_start = NULL, - .dev_stop = NULL, - .dev_close = NULL, - .dev_infos_get = NULL, + .dev_configure = cnxk_cpt_dev_config, + .dev_start = cnxk_cpt_dev_start, + .dev_stop = cnxk_cpt_dev_stop, + .dev_close = cnxk_cpt_dev_close, + .dev_infos_get = cn9k_cpt_dev_info_get, .stats_get = NULL, .stats_reset = NULL, diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c new file mode 100644 index 0000000..3d0efc7 --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include +#include +#include + +#include "roc_cpt.h" + +#include "cnxk_cryptodev.h" +#include "cnxk_cryptodev_ops.h" + +int +cnxk_cpt_dev_config(struct rte_cryptodev *dev, + struct rte_cryptodev_config *conf) +{ + struct cnxk_cpt_vf *vf = dev->data->dev_private; + struct roc_cpt *roc_cpt = &vf->cpt; + uint16_t nb_lf_avail, nb_lf; + int ret; + + dev->feature_flags &= ~conf->ff_disable; + + nb_lf_avail = roc_cpt->nb_lf_avail; + nb_lf = conf->nb_queue_pairs; + + if (nb_lf > nb_lf_avail) + return -ENOTSUP; + + ret = roc_cpt_dev_configure(roc_cpt, nb_lf); + if (ret) { + plt_err("Could not configure device"); + return ret; + } + + return 0; +} + +int +cnxk_cpt_dev_start(struct rte_cryptodev *dev) +{ + RTE_SET_USED(dev); + + return 0; +} + +void +cnxk_cpt_dev_stop(struct rte_cryptodev *dev) +{ + RTE_SET_USED(dev); +} + +int +cnxk_cpt_dev_close(struct rte_cryptodev *dev) +{ + struct cnxk_cpt_vf *vf = dev->data->dev_private; + + roc_cpt_dev_clear(&vf->cpt); + + return 0; +} + +void +cnxk_cpt_dev_info_get(struct rte_cryptodev *dev, + struct rte_cryptodev_info *info) +{ + struct cnxk_cpt_vf *vf = dev->data->dev_private; + struct roc_cpt *roc_cpt = &vf->cpt; + + info->max_nb_queue_pairs = roc_cpt->nb_lf_avail; + info->feature_flags = dev->feature_flags; + info->capabilities = NULL; + info->sym.max_nb_sessions = 0; + info->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ; + info->min_mbuf_tailroom_req = CNXK_CPT_MIN_TAILROOM_REQ; +} diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h new file mode 100644 index 0000000..604e71a --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CNXK_CRYPTODEV_OPS_H_ +#define _CNXK_CRYPTODEV_OPS_H_ + +#include + +#define CNXK_CPT_MIN_HEADROOM_REQ 24 +#define CNXK_CPT_MIN_TAILROOM_REQ 8 + +int cnxk_cpt_dev_config(struct rte_cryptodev *dev, + struct rte_cryptodev_config *conf); + +int cnxk_cpt_dev_start(struct rte_cryptodev *dev); + +void cnxk_cpt_dev_stop(struct rte_cryptodev *dev); + +int cnxk_cpt_dev_close(struct rte_cryptodev *dev); + +void cnxk_cpt_dev_info_get(struct rte_cryptodev *dev, + struct rte_cryptodev_info *info); + +#endif /* _CNXK_CRYPTODEV_OPS_H_ */ diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build index 4150ae6..74b7795 100644 --- a/drivers/crypto/cnxk/meson.build +++ b/drivers/crypto/cnxk/meson.build @@ -14,6 +14,7 @@ sources = files( 'cn10k_cryptodev.c', 'cn10k_cryptodev_ops.c', 'cnxk_cryptodev.c', + 'cnxk_cryptodev_ops.c', ) deps += ['bus_pci', 'common_cnxk'] -- 2.7.4