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From: Anoob Joseph <anoobj@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>
Cc: Anoob Joseph <anoobj@marvell.com>,
	Jerin Jacob <jerinj@marvell.com>,
	"Ankur Dwivedi" <adwivedi@marvell.com>,
	Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>,
	Archana Muniganti <marchana@marvell.com>
Subject: [dpdk-dev] [PATCH 06/20] crypto/cnxk: add session ops framework
Date: Wed, 2 Jun 2021 22:13:27 +0530	[thread overview]
Message-ID: <1622652221-22732-7-git-send-email-anoobj@marvell.com> (raw)
In-Reply-To: <1622652221-22732-1-git-send-email-anoobj@marvell.com>

Add session ops
- sym_session_get_size
- sym_session_configure
- sym_session_clear

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   6 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |   6 +-
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 187 ++++++++++++++++++++++++++++++
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  27 +++++
 drivers/crypto/cnxk/cnxk_se.h             |  31 +++++
 5 files changed, 251 insertions(+), 6 deletions(-)
 create mode 100644 drivers/crypto/cnxk/cnxk_se.h

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 007d449..34dc107 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {
 	.queue_pair_release = cnxk_cpt_queue_pair_release,
 
 	/* Symmetric crypto ops */
-	.sym_session_get_size = NULL,
-	.sym_session_configure = NULL,
-	.sym_session_clear = NULL,
+	.sym_session_get_size = cnxk_cpt_sym_session_get_size,
+	.sym_session_configure = cnxk_cpt_sym_session_configure,
+	.sym_session_clear = cnxk_cpt_sym_session_clear,
 
 	/* Asymmetric crypto ops */
 	.asym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 73ccf5b..bef6159 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {
 	.queue_pair_release = cnxk_cpt_queue_pair_release,
 
 	/* Symmetric crypto ops */
-	.sym_session_get_size = NULL,
-	.sym_session_configure = NULL,
-	.sym_session_clear = NULL,
+	.sym_session_get_size = cnxk_cpt_sym_session_get_size,
+	.sym_session_configure = cnxk_cpt_sym_session_configure,
+	.sym_session_clear = cnxk_cpt_sym_session_clear,
 
 	/* Asymmetric crypto ops */
 	.asym_session_get_size = NULL,
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index d36258b..c2e07cf 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -12,6 +12,7 @@
 #include "cnxk_cryptodev.h"
 #include "cnxk_cryptodev_ops.h"
 #include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_se.h"
 
 int
 cnxk_cpt_dev_config(struct rte_cryptodev *dev,
@@ -312,3 +313,189 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	cnxk_cpt_qp_destroy(dev, qp);
 	return ret;
 }
+
+unsigned int
+cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
+{
+	return sizeof(struct cnxk_se_sess);
+}
+
+static int
+sym_xform_verify(struct rte_crypto_sym_xform *xform)
+{
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&
+	    xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)
+		return -ENOTSUP;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
+		return CNXK_CPT_CIPHER;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
+		return CNXK_CPT_AUTH;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD && xform->next == NULL)
+		return CNXK_CPT_AEAD;
+
+	if (xform->next == NULL)
+		return -EIO;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)
+		return -ENOTSUP;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)
+		return -ENOTSUP;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->next->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)
+		return CNXK_CPT_CIPHER_ENC_AUTH_GEN;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)
+		return CNXK_CPT_AUTH_VRFY_CIPHER_DEC;
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
+		switch (xform->auth.algo) {
+		case RTE_CRYPTO_AUTH_SHA1_HMAC:
+			switch (xform->next->cipher.algo) {
+			case RTE_CRYPTO_CIPHER_AES_CBC:
+				return CNXK_CPT_AUTH_GEN_CIPHER_ENC;
+			default:
+				return -ENOTSUP;
+			}
+		default:
+			return -ENOTSUP;
+		}
+	}
+
+	if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
+	    xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&
+	    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
+	    xform->next->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) {
+		switch (xform->cipher.algo) {
+		case RTE_CRYPTO_CIPHER_AES_CBC:
+			switch (xform->next->auth.algo) {
+			case RTE_CRYPTO_AUTH_SHA1_HMAC:
+				return CNXK_CPT_CIPHER_DEC_AUTH_VRFY;
+			default:
+				return -ENOTSUP;
+			}
+		default:
+			return -ENOTSUP;
+		}
+	}
+
+	return -ENOTSUP;
+}
+
+static uint64_t
+cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt)
+{
+	union cpt_inst_w7 inst_w7;
+
+	inst_w7.s.cptr = (uint64_t)&sess->roc_se_ctx.se_ctx;
+
+	/* Set the engine group */
+	if (sess->zsk_flag || sess->chacha_poly)
+		inst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_SE];
+	else
+		inst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];
+
+	return inst_w7.u64;
+}
+
+int
+sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,
+		      struct rte_crypto_sym_xform *xform,
+		      struct rte_cryptodev_sym_session *sess,
+		      struct rte_mempool *pool)
+{
+	struct cnxk_se_sess *sess_priv;
+	void *priv;
+	int ret;
+
+	ret = sym_xform_verify(xform);
+	if (unlikely(ret < 0))
+		return ret;
+
+	if (unlikely(rte_mempool_get(pool, &priv))) {
+		CPT_LOG_DP_ERR("Could not allocate session private data");
+		return -ENOMEM;
+	}
+
+	memset(priv, 0, sizeof(struct cnxk_se_sess));
+
+	sess_priv = priv;
+
+	switch (ret) {
+	default:
+		ret = -1;
+	}
+
+	if (ret)
+		goto priv_put;
+
+	sess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt);
+
+	set_sym_session_private_data(sess, driver_id, sess_priv);
+
+	return 0;
+
+priv_put:
+	rte_mempool_put(pool, priv);
+
+	return -ENOTSUP;
+}
+
+int
+cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,
+			       struct rte_crypto_sym_xform *xform,
+			       struct rte_cryptodev_sym_session *sess,
+			       struct rte_mempool *pool)
+{
+	struct cnxk_cpt_vf *vf = dev->data->dev_private;
+	struct roc_cpt *roc_cpt = &vf->cpt;
+	uint8_t driver_id;
+
+	driver_id = dev->driver_id;
+
+	return sym_session_configure(roc_cpt, driver_id, xform, sess, pool);
+}
+
+void
+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
+{
+	void *priv = get_sym_session_private_data(sess, driver_id);
+	struct rte_mempool *pool;
+
+	if (priv == NULL)
+		return;
+
+	memset(priv, 0, cnxk_cpt_sym_session_get_size(NULL));
+
+	pool = rte_mempool_from_obj(priv);
+
+	set_sym_session_private_data(sess, driver_id, NULL);
+
+	rte_mempool_put(pool, priv);
+}
+
+void
+cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev,
+			   struct rte_cryptodev_sym_session *sess)
+{
+	return sym_session_clear(dev->driver_id, sess);
+}
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index 96a0f87..8f9b4fe 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -17,6 +17,16 @@ struct cpt_qp_meta_info {
 	int mlen;
 };
 
+enum sym_xform_type {
+	CNXK_CPT_CIPHER = 1,
+	CNXK_CPT_AUTH,
+	CNXK_CPT_AEAD,
+	CNXK_CPT_CIPHER_ENC_AUTH_GEN,
+	CNXK_CPT_AUTH_VRFY_CIPHER_DEC,
+	CNXK_CPT_AUTH_GEN_CIPHER_ENC,
+	CNXK_CPT_CIPHER_DEC_AUTH_VRFY
+};
+
 struct cpt_inflight_req {
 	union cpt_res_s res;
 	struct rte_crypto_op *cop;
@@ -70,4 +80,21 @@ int cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 
 int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);
 
+unsigned int cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev);
+
+int cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,
+				   struct rte_crypto_sym_xform *xform,
+				   struct rte_cryptodev_sym_session *sess,
+				   struct rte_mempool *pool);
+
+int sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,
+			  struct rte_crypto_sym_xform *xform,
+			  struct rte_cryptodev_sym_session *sess,
+			  struct rte_mempool *pool);
+
+void cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev,
+				struct rte_cryptodev_sym_session *sess);
+
+void sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess);
+
 #endif /* _CNXK_CRYPTODEV_OPS_H_ */
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
new file mode 100644
index 0000000..9cccab0
--- /dev/null
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+
+#ifndef _CNXK_SE_H_
+#define _CNXK_SE_H_
+#include <stdbool.h>
+
+#include "roc_se.h"
+
+struct cnxk_se_sess {
+	uint16_t cpt_op : 4;
+	uint16_t zsk_flag : 4;
+	uint16_t aes_gcm : 1;
+	uint16_t aes_ctr : 1;
+	uint16_t chacha_poly : 1;
+	uint16_t is_null : 1;
+	uint16_t is_gmac : 1;
+	uint16_t rsvd1 : 3;
+	uint16_t aad_length;
+	uint8_t mac_len;
+	uint8_t iv_length;
+	uint8_t auth_iv_length;
+	uint16_t iv_offset;
+	uint16_t auth_iv_offset;
+	uint32_t salt;
+	uint64_t cpt_inst_w7;
+	struct roc_se_ctx roc_se_ctx;
+} __rte_cache_aligned;
+
+#endif /*_CNXK_SE_H_ */
-- 
2.7.4


  parent reply	other threads:[~2021-06-02 16:45 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-02 16:43 [dpdk-dev] [PATCH 00/20] Add Marvell CNXK crypto PMDs Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 01/20] crypto/cnxk: add driver skeleton Anoob Joseph
2021-06-16  7:28   ` Akhil Goyal
2021-06-16  7:37     ` Anoob Joseph
2021-06-16  7:47       ` Akhil Goyal
2021-06-16 19:58   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 02/20] crypto/cnxk: add probe and remove Anoob Joseph
2021-06-16 10:51   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 03/20] crypto/cnxk: add device control ops Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 04/20] crypto/cnxk: add symmetric crypto capabilities Anoob Joseph
2021-06-16  9:47   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 05/20] crypto/cnxk: add queue pair ops Anoob Joseph
2021-06-16 11:05   ` Akhil Goyal
2021-06-17  7:13     ` Anoob Joseph
2021-06-02 16:43 ` Anoob Joseph [this message]
2021-06-02 16:43 ` [dpdk-dev] [PATCH 07/20] crypto/cnxk: add enqueue burst op Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 08/20] crypto/cnxk: add dequeue " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 09/20] crypto/cnxk: add cipher operation in session Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 10/20] crypto/cnxk: add auth " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 11/20] crypto/cnxk: add aead " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 12/20] crypto/cnxk: add chained " Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 13/20] crypto/cnxk: add flexi crypto cipher encrypt Anoob Joseph
2021-06-16 19:45   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 14/20] crypto/cnxk: add flexi crypto cipher decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 15/20] crypto/cnxk: add ZUC and SNOW3G encrypt Anoob Joseph
2021-06-16 19:51   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 16/20] crypto/cnxk: add ZUC and SNOW3G decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 17/20] crypto/cnxk: add KASUMI encrypt Anoob Joseph
2021-06-16 19:51   ` Akhil Goyal
2021-06-02 16:43 ` [dpdk-dev] [PATCH 18/20] crypto/cnxk: add KASUMI decrypt Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 19/20] crypto/cnxk: add digest support Anoob Joseph
2021-06-02 16:43 ` [dpdk-dev] [PATCH 20/20] test/crypto: enable cnxk crypto PMDs Anoob Joseph
2021-06-16  7:23 ` [dpdk-dev] [PATCH 00/20] Add Marvell CNXK " Akhil Goyal
2021-06-16 19:56 ` Akhil Goyal

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