From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 860C6A0C40; Fri, 25 Jun 2021 07:38:11 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 87354410EC; Fri, 25 Jun 2021 07:37:59 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8E92C40E78 for ; Fri, 25 Jun 2021 07:37:56 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15P5a2Vw018421; Thu, 24 Jun 2021 22:37:55 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=39fQE2mrHTPXpcaj9ogQG4JKohpkM8hGr89yEY/Raps=; b=gS2Q+8hVPm49HfbMl9DIPk8lZ/siTMm0HrYj/fcCSjDgfchk3gkeWvtzVfXDi6OmTcwT /VVSwQE/nqA5fHl2O8rzrRg2K+AMEy/Rh+hizqmqfL6/P8PVmRjWh+TMS4seFSIB+gWC 8qgyMUw2xVvr5IzgDtPrPHY8uhVZFmBJZX+jCJjY8VAkZ4CBnhgfkyzkaCLc4SEWwBvR bkl6f0fY6x7ipZvN3BgxK6j+6nIBEvkOXDT7zc7XFYvZPBA4HtcP7ZZAWD0Ot6aPHAwY 0nCMMmElfaHh7ifHcSEHueeq9DgOSmBLQ5SR+C+Wu+xW/JTXmJfWAB54DOZPSy6CKyeT Ew== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhh4v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 Jun 2021 22:37:55 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Jun 2021 22:37:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 24 Jun 2021 22:37:53 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id 138143F7041; Thu, 24 Jun 2021 22:37:50 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Vidya Sagar Velumuri , Jerin Jacob , Ankur Dwivedi , Tejasree Kondoj , Date: Fri, 25 Jun 2021 11:06:41 +0530 Message-ID: <1624599410-29689-10-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624599410-29689-1-git-send-email-anoobj@marvell.com> References: <1624599410-29689-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: zPtEjgn01tHeSzTNJDOS7X6Jrwm7L8oK X-Proofpoint-ORIG-GUID: zPtEjgn01tHeSzTNJDOS7X6Jrwm7L8oK X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-25_01:2021-06-24, 2021-06-25 signatures=0 Subject: [dpdk-dev] [PATCH v2 09/17] common/cnxk: add inline IPsec configuration mbox X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vidya Sagar Velumuri Add mbox to configure inbound & outbound inline IPsec. Signed-off-by: Tejasree Kondoj Signed-off-by: Vidya Sagar Velumuri --- drivers/common/cnxk/roc_cpt.c | 61 ++++++++++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_cpt.h | 5 ++++ drivers/common/cnxk/roc_cpt_priv.h | 2 ++ drivers/common/cnxk/version.map | 2 ++ 4 files changed, 70 insertions(+) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index fd92de3..81e8b15 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -217,6 +217,67 @@ cpt_lf_dump(struct roc_cpt_lf *lf) } int +cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func, + uint8_t lf_id, bool ena) +{ + struct cpt_inline_ipsec_cfg_msg *req; + struct mbox *mbox = dev->mbox; + + req = mbox_alloc_msg_cpt_inline_ipsec_cfg(mbox); + if (req == NULL) + return -ENOSPC; + + req->dir = CPT_INLINE_OUTBOUND; + req->slot = lf_id; + if (ena) { + req->enable = 1; + req->sso_pf_func = sso_pf_func; + req->nix_pf_func = nix_pf_func; + } else { + req->enable = 0; + } + + return mbox_process(mbox); +} + +int +roc_cpt_inline_ipsec_cfg(struct dev *cpt_dev, uint8_t lf_id, + struct roc_nix *roc_nix) +{ + bool ena = roc_nix ? true : false; + uint16_t nix_pf_func = 0; + uint16_t sso_pf_func = 0; + + if (ena) { + nix_pf_func = roc_nix_get_pf_func(roc_nix); + sso_pf_func = idev_sso_pffunc_get(); + } + + return cpt_lf_outb_cfg(cpt_dev, sso_pf_func, nix_pf_func, lf_id, ena); +} + +int +roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1, + uint16_t param2) +{ + struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt); + struct cpt_rx_inline_lf_cfg_msg *req; + struct mbox *mbox; + + mbox = cpt->dev.mbox; + + req = mbox_alloc_msg_cpt_rx_inline_lf_cfg(mbox); + if (req == NULL) + return -ENOSPC; + + req->sso_pf_func = idev_sso_pffunc_get(); + req->param1 = param1; + req->param2 = param2; + + return mbox_process(mbox); +} + +int roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg) { struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt); diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index 022c8ad..83ef5c7 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -29,6 +29,7 @@ struct roc_cpt_lf { uint64_t *fc_addr; uint64_t io_addr; uint8_t *iq_vaddr; + struct roc_nix *inl_outb_nix; } __plt_cache_aligned; struct roc_cpt { @@ -64,6 +65,10 @@ void __roc_api roc_cpt_dev_clear(struct roc_cpt *roc_cpt); int __roc_api roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf); void __roc_api roc_cpt_lf_fini(struct roc_cpt_lf *lf); int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, uint64_t cptr); +int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot, + struct roc_nix *nix); +int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, + uint16_t param1, uint16_t param2); int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt); int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt); void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf); diff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h index 6cfa4df..0880ec0 100644 --- a/drivers/common/cnxk/roc_cpt_priv.h +++ b/drivers/common/cnxk/roc_cpt_priv.h @@ -33,6 +33,8 @@ int cpt_lfs_free(struct dev *dev); int cpt_lf_init(struct roc_cpt_lf *lf); void cpt_lf_fini(struct roc_cpt_lf *lf); +int cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func, + uint8_t lf_id, bool ena); int cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp); uint64_t cpt_get_blkaddr(struct dev *dev); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index 0827b77..59d7d91 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -17,6 +17,8 @@ INTERNAL { roc_cpt_dev_fini; roc_cpt_dev_init; roc_cpt_eng_grp_add; + roc_cpt_inline_ipsec_cfg; + roc_cpt_inline_ipsec_inb_cfg; roc_cpt_iq_disable; roc_cpt_lf_ctx_flush; roc_cpt_lf_init; -- 2.7.4