From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 17842A0C40; Fri, 25 Jun 2021 08:15:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F41E140E78; Fri, 25 Jun 2021 08:15:46 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0BB3740E5A for ; Fri, 25 Jun 2021 08:15:45 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15P66Hfm002192; Thu, 24 Jun 2021 23:15:45 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=KpDQMKCDXJ00fRC0tAJKPOPYOHAvWf/xvR/FwGEaKAk=; b=O50Ss5nJSmG/i4aqQaL/7SIrHLcA0dXvR4dNtIjahURPISahRXYwgax2JQ3EFYYhXTV8 2gCofsmTAhUwYpXI4XzcUb6HEdh9Nz/Kjt1OHSFO6dg+ONwdWfo/y8TMzJqmtC9GTHM+ OLZ9lfrAfLgZYko+Xq5MjRHgkBgsbjId2TLCSMluwD9VtFgGa6J0Sgw0+tD/jc+ucbeR DLV1IoHhPa+lRdK19LlmPeVBm6s7gE41DlKQYVu8DZx48ID6UUZwGFMMiHEm4Wf4hR1n 4hr295dWfvl5y/1zt9UdoT6/P5GM6bqBFHCnJKzDmL7NPXnowI28qvwzDSQlKm7QQIXP 2Q== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhmsg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 Jun 2021 23:15:45 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Jun 2021 23:15:43 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 24 Jun 2021 23:15:43 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id F31B63F7041; Thu, 24 Jun 2021 23:15:39 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Srujana Challa , Jerin Jacob , Ankur Dwivedi , Tejasree Kondoj , , Anoob Joseph Date: Fri, 25 Jun 2021 11:45:05 +0530 Message-ID: <1624601708-29991-2-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624601708-29991-1-git-send-email-anoobj@marvell.com> References: <1622653862-22830-2-git-send-email-anoobj@marvell.com> <1624601708-29991-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: DsLB68KORk8y33j1UsSRGTqt9Pb-vN1s X-Proofpoint-ORIG-GUID: DsLB68KORk8y33j1UsSRGTqt9Pb-vN1s X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-25_02:2021-06-24, 2021-06-25 signatures=0 Subject: [dpdk-dev] [PATCH v2 1/4] crypto/cnxk: add security ctx skeleton X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Srujana Challa Add security ctx in cn10k crypto PMD. Signed-off-by: Anoob Joseph Signed-off-by: Srujana Challa Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cn10k_cryptodev.c | 9 ++++++ drivers/crypto/cnxk/cnxk_cryptodev_sec.c | 47 ++++++++++++++++++++++++++++++++ drivers/crypto/cnxk/cnxk_cryptodev_sec.h | 14 ++++++++++ drivers/crypto/cnxk/meson.build | 3 +- 4 files changed, 72 insertions(+), 1 deletion(-) create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_sec.h diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c index 559aaef..ffe654c 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev.c @@ -14,6 +14,7 @@ #include "cn10k_cryptodev_ops.h" #include "cnxk_cryptodev.h" #include "cnxk_cryptodev_capabilities.h" +#include "cnxk_cryptodev_sec.h" #include "roc_api.h" @@ -77,6 +78,11 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, plt_err("Failed to add engine group rc=%d", rc); goto dev_fini; } + + /* Create security context */ + rc = cnxk_crypto_sec_ctx_create(dev); + if (rc) + goto dev_fini; } cnxk_cpt_caps_populate(vf); @@ -126,6 +132,9 @@ cn10k_cpt_pci_remove(struct rte_pci_device *pci_dev) if (dev == NULL) return -ENODEV; + /* Destroy security context */ + cnxk_crypto_sec_ctx_destroy(dev); + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { vf = dev->data->dev_private; ret = roc_cpt_dev_fini(&vf->cpt); diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c new file mode 100644 index 0000000..f03d2ed --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include +#include +#include +#include + +#include "cnxk_cryptodev_sec.h" + +/* Common security ops */ +struct rte_security_ops cnxk_sec_ops = { + .session_create = NULL, + .session_destroy = NULL, + .session_get_size = NULL, + .set_pkt_metadata = NULL, + .get_userdata = NULL, + .capabilities_get = NULL, +}; + +int +cnxk_crypto_sec_ctx_create(struct rte_cryptodev *cdev) +{ + struct rte_security_ctx *ctx; + + ctx = rte_malloc("cnxk_cpt_dev_sec_ctx", + sizeof(struct rte_security_ctx), 0); + + if (ctx == NULL) + return -ENOMEM; + + /* Populate ctx */ + ctx->device = cdev; + ctx->ops = &cnxk_sec_ops; + ctx->sess_cnt = 0; + + cdev->security_ctx = ctx; + + return 0; +} + +void +cnxk_crypto_sec_ctx_destroy(struct rte_cryptodev *cdev) +{ + rte_free(cdev->security_ctx); +} diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.h b/drivers/crypto/cnxk/cnxk_cryptodev_sec.h new file mode 100644 index 0000000..9ab0e9e --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef __CNXK_CRYPTODEV_SEC_H__ +#define __CNXK_CRYPTODEV_SEC_H__ + +#include + +int cnxk_crypto_sec_ctx_create(struct rte_cryptodev *crypto_dev); + +void cnxk_crypto_sec_ctx_destroy(struct rte_cryptodev *crypto_dev); + +#endif /* __CNXK_CRYPTODEV_SEC_H__ */ diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build index fa6be06..a2b461e 100644 --- a/drivers/crypto/cnxk/meson.build +++ b/drivers/crypto/cnxk/meson.build @@ -16,6 +16,7 @@ sources = files( 'cnxk_cryptodev.c', 'cnxk_cryptodev_capabilities.c', 'cnxk_cryptodev_ops.c', + 'cnxk_cryptodev_sec.c', ) -deps += ['bus_pci', 'common_cnxk'] +deps += ['bus_pci', 'common_cnxk', 'security'] -- 2.7.4