From: <skoteshwar@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH v3 2/8] common/cnxk: support SMQ flush
Date: Wed, 22 Sep 2021 02:11:42 -0400 [thread overview]
Message-ID: <1632291108-28780-3-git-send-email-skoteshwar@marvell.com> (raw)
In-Reply-To: <1632291108-28780-1-git-send-email-skoteshwar@marvell.com>
From: Satha Rao <skoteshwar@marvell.com>
Each NIX interface had one or more SMQs connected to SQs to send
packets. When flush enabled on SMQ, hardware will push all packets
from SMQ to physical link. This API will enable flush on all SMQs
of an interface.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
drivers/common/cnxk/hw/nix.h | 6 ++++
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_tm_ops.c | 50 ++++++++++++++++++++++++++++
drivers/common/cnxk/version.map | 1 +
4 files changed, 58 insertions(+)
diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h
index a0ffd25660..bc908c25b1 100644
--- a/drivers/common/cnxk/hw/nix.h
+++ b/drivers/common/cnxk/hw/nix.h
@@ -2189,4 +2189,10 @@ struct nix_lso_format {
#define NIX_LSO_FORMAT_IDX_TSOV4 0
#define NIX_LSO_FORMAT_IDX_TSOV6 1
+/* [CN10K, .) */
+#define NIX_SENDSTATALG_MASK 0x7
+#define NIX_SENDSTATALG_SEL_MASK 0x8
+#define NIX_SENDSTAT_IOFFSET_MASK 0xFFF
+#define NIX_SENDSTAT_OOFFSET_MASK 0xFFF
+
#endif /* __NIX_HW_H__ */
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index b0e6fabe31..ac7bd7e3ec 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -468,6 +468,7 @@ int __roc_api roc_nix_tm_rsrc_count(struct roc_nix *roc_nix,
int __roc_api roc_nix_tm_node_name_get(struct roc_nix *roc_nix,
uint32_t node_id, char *buf,
size_t buflen);
+int __roc_api roc_nix_smq_flush(struct roc_nix *roc_nix);
/* MAC */
int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c
index f2173c9a58..02ee08bc4c 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -317,6 +317,56 @@ roc_nix_tm_node_delete(struct roc_nix *roc_nix, uint32_t node_id, bool free)
return nix_tm_node_delete(roc_nix, node_id, ROC_NIX_TM_USER, free);
}
+int
+roc_nix_smq_flush(struct roc_nix *roc_nix)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ struct nix_tm_node_list *list;
+ enum roc_nix_tm_tree tree;
+ struct nix_tm_node *node;
+ int rc = 0;
+
+ if (!(nix->tm_flags & NIX_TM_HIERARCHY_ENA))
+ return 0;
+
+ tree = nix->tm_tree;
+ list = nix_tm_node_list(nix, tree);
+
+ /* XOFF & Flush all SMQ's. HRM mandates
+ * all SQ's empty before SMQ flush is issued.
+ */
+ TAILQ_FOREACH(node, list, node) {
+ if (node->hw_lvl != NIX_TXSCH_LVL_SMQ)
+ continue;
+ if (!(node->flags & NIX_TM_NODE_HWRES))
+ continue;
+
+ rc = nix_tm_smq_xoff(nix, node, true);
+ if (rc) {
+ plt_err("Failed to enable smq %u, rc=%d", node->hw_id,
+ rc);
+ goto exit;
+ }
+ }
+
+ /* XON all SMQ's */
+ TAILQ_FOREACH(node, list, node) {
+ if (node->hw_lvl != NIX_TXSCH_LVL_SMQ)
+ continue;
+ if (!(node->flags & NIX_TM_NODE_HWRES))
+ continue;
+
+ rc = nix_tm_smq_xoff(nix, node, false);
+ if (rc) {
+ plt_err("Failed to enable smq %u, rc=%d", node->hw_id,
+ rc);
+ goto exit;
+ }
+ }
+exit:
+ return rc;
+}
+
int
roc_nix_tm_hierarchy_disable(struct roc_nix *roc_nix)
{
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index 5df2e56ce6..388f9385e0 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -170,6 +170,7 @@ INTERNAL {
roc_nix_xstats_names_get;
roc_nix_switch_hdr_set;
roc_nix_eeprom_info_get;
+ roc_nix_smq_flush;
roc_nix_tm_dump;
roc_nix_tm_fini;
roc_nix_tm_free_resources;
--
2.25.1
next prev parent reply other threads:[~2021-09-22 6:12 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-01 17:10 [dpdk-dev] [PATCH 1/8] common/cnxk: use different macros for sdp and lbk max frames skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 2/8] common/cnxk: flush smq skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 3/8] common/cnxk: increase sched weight and shaper burst limit skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 4/8] common/cnxk: handle packet mode shaper limits skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 5/8] common/cnxk: handler to get rte tm error type skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 6/8] common/cnxk: set of handlers to get tm hierarchy internals skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 7/8] net/cnxk: tm capabilities and queue rate limit handlers skoteshwar
2021-09-01 17:10 ` [dpdk-dev] [PATCH 8/8] net/cnxk: tm shaper and node operations skoteshwar
2021-09-16 7:17 ` [dpdk-dev] [PATCH 1/8] common/cnxk: use different macros for sdp and lbk max frames Jerin Jacob
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 0/8] Add TM Support for CN9K and CN10K skoteshwar
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 1/8] common/cnxk: use different macros for sdp and lbk max frames skoteshwar
2021-09-21 6:35 ` Jerin Jacob
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 2/8] common/cnxk: flush smq skoteshwar
2021-09-21 6:37 ` Jerin Jacob
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 3/8] common/cnxk: increase sched weight and shaper burst limit skoteshwar
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 4/8] common/cnxk: handle packet mode shaper limits skoteshwar
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 5/8] common/cnxk: handler to get rte tm error type skoteshwar
2021-09-21 6:41 ` Jerin Jacob
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 6/8] common/cnxk: set of handlers to get tm hierarchy internals skoteshwar
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 7/8] net/cnxk: tm capabilities and queue rate limit handlers skoteshwar
2021-09-21 6:43 ` Jerin Jacob
2021-09-18 14:31 ` [dpdk-dev] [PATCH v2 8/8] net/cnxk: tm shaper and node operations skoteshwar
2021-09-20 8:59 ` [dpdk-dev] [PATCH v2 0/8] Add TM Support for CN9K and CN10K nithind1988
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 " skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 1/8] common/cnxk: set appropriate max frame size for SDP and LBK skoteshwar
2021-09-27 13:29 ` Jerin Jacob
2021-09-22 6:11 ` skoteshwar [this message]
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 3/8] common/cnxk: increase sched weight and shaper burst limit skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 4/8] common/cnxk: handle packet mode shaper limits skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 5/8] common/cnxk: support TM error type get skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 6/8] common/cnxk: set of handlers to get TM hierarchy internals skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 7/8] net/cnxk: TM capabilities and queue rate limit handlers skoteshwar
2021-09-22 6:11 ` [dpdk-dev] [PATCH v3 8/8] net/cnxk: TM shaper and node operations skoteshwar
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