From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 88517A034F; Tue, 7 Dec 2021 07:52:30 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3833D4273D; Tue, 7 Dec 2021 07:52:08 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id D8C4842745 for ; Tue, 7 Dec 2021 07:52:06 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1B76pJvo018306 for ; Mon, 6 Dec 2021 22:52:05 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=W72FwWgTu3+ZHdD7xzSs6ZOX+TkamclZJ45o+7qCwSA=; b=UcbHMhoUKf02zLD1+0/dsAufSTZA6jaaoo2dqVsIdeI5H9Z2YPnxm1tuZ5esl/PzjX0G ZqHMOXR3OQ4zKpvEgx1p32IA/w/H7jTi0qA0Iq2Xan8Q7fVfGtcVfHMs3xwd6mfGOPvd mPOYJdBu4hMN0mREcznxw0KTXMddoKNCfkOsheLo3bt8cTYuTCcpYlBfOwILwNLyztnQ KNlZff9+2iizW+ytJrPqO0cuYT01U0IvgCYsUsLmh9B1FTxadqiRlH6PGKvtisKnonHj oi/E5IRq2JZ52TScB/vYQcyTZC3o6rAkbWL1zKKQVft/IdecerF2j2GyRufcsSZeU0Fe QQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3ct2q9004x-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 06 Dec 2021 22:52:05 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 6 Dec 2021 22:51:05 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 6 Dec 2021 22:51:05 -0800 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id 6A57B3F7092; Mon, 6 Dec 2021 22:51:03 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Anoob Joseph , Archana Muniganti , Tejasree Kondoj , Subject: [PATCH 00/25] New features and improvements in cnxk crypto PMD Date: Tue, 7 Dec 2021 12:20:33 +0530 Message-ID: <1638859858-734-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 3MYLgSGHNuOXbsvN6zIorUXk6prt4rA0 X-Proofpoint-ORIG-GUID: 3MYLgSGHNuOXbsvN6zIorUXk6prt4rA0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-07_02,2021-12-06_02,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org New features and fixes to cnxk crypto PMDs - Support for more algorithms in lookaside crypto & protocol - Support for copy & set DF bit - Support for CPT CTX update - Support for security session stats in cn10k Ankur Dwivedi (1): crypto/cnxk: add security session stats get Anoob Joseph (17): common/cnxk: define minor opcodes for MISC opcode common/cnxk: add aes-xcbc key derive common/cnxk: fix reset of fields common/cnxk: verify input args crypto/cnxk: clear session data before populating crypto/cnxk: update max sec crypto caps crypto/cnxk: account for CPT CTX updates and flush delays crypto/cnxk: use struct sizes for ctx writes crypto/cnxk: add skip for unsupported cases crypto/cnxk: handle null chained ops crypto/cnxk: fix inflight cnt calculation crypto/cnxk: use atomics to access cpt res crypto/cnxk: add more info on command timeout crypto/cnxk: fix extend tail calculation crypto/cnxk: add aes xcbc and null cipher crypto/cnxk: add copy and set DF crypto/cnxk: add aes cmac Archana Muniganti (1): common/cnxk: add bit fields for params Shijith Thotton (1): crypto/cnxk: only enable queues that are allocated Tejasree Kondoj (5): crypto/cnxk: add lookaside IPsec AES-CBC-HMAC-SHA256 support crypto/cnxk: write CPT CTX through microcode op crypto/cnxk: support cnxk lookaside IPsec HMAC-SHA384/512 crypto/cnxk: add context reload for IV crypto/cnxk: support lookaside IPsec AES-CTR doc/guides/cryptodevs/cnxk.rst | 50 ++++- doc/guides/cryptodevs/features/cn10k.ini | 37 ++-- doc/guides/cryptodevs/features/cn9k.ini | 37 ++-- doc/guides/rel_notes/release_22_03.rst | 10 + drivers/common/cnxk/cnxk_security.c | 92 ++++++-- drivers/common/cnxk/hw/cpt.h | 15 ++ drivers/common/cnxk/meson.build | 1 + drivers/common/cnxk/roc_aes.c | 208 ++++++++++++++++++ drivers/common/cnxk/roc_aes.h | 14 ++ drivers/common/cnxk/roc_api.h | 3 + drivers/common/cnxk/roc_cpt.c | 4 +- drivers/common/cnxk/roc_cpt.h | 24 +-- drivers/common/cnxk/roc_ie_on.h | 40 +++- drivers/common/cnxk/roc_se.h | 14 +- drivers/common/cnxk/version.map | 1 + drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 36 ++-- drivers/crypto/cnxk/cn10k_ipsec.c | 231 ++++++++++++++++---- drivers/crypto/cnxk/cn10k_ipsec.h | 25 ++- drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 28 ++- drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 29 ++- drivers/crypto/cnxk/cn9k_ipsec.c | 221 ++++++++++++++----- drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 6 +- drivers/crypto/cnxk/cnxk_cryptodev.h | 2 +- drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c | 155 +++++++++++++- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 245 +++++++++++++--------- drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 17 +- drivers/crypto/cnxk/cnxk_cryptodev_sec.c | 1 + drivers/crypto/cnxk/cnxk_ipsec.h | 19 +- drivers/crypto/cnxk/cnxk_se.h | 66 ++++-- 29 files changed, 1283 insertions(+), 348 deletions(-) create mode 100644 drivers/common/cnxk/roc_aes.c create mode 100644 drivers/common/cnxk/roc_aes.h -- 2.7.4