From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47DBAA034F; Tue, 7 Dec 2021 07:52:12 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2D5C342730; Tue, 7 Dec 2021 07:51:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id A186E426DC for ; Tue, 7 Dec 2021 07:51:54 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1B75a0L1014936 for ; Mon, 6 Dec 2021 22:51:54 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=6jNBhTKdZpCiYpzmg4yTdYvM00tL5KoiGtP83OoJWec=; b=CPzuxb7jAY8V18AlRXl6g24VMhdyGmcT1H7KKsxcKJ0562SFDStmGwF/CpKD0R2c0iBx INKuj9WtAKaI9YaSKClYHcVfqkBwWhlFDhbnNZZi7TFGq28eXr7kLu4vg99x0aAutj2o lYxLT6ZY/u77gyqw0SyKvaIbshxXVFjxQXl1OSzbSPREsnN2MApMjFvUZlf78kNq2wUy Yb+rlQMExg0mwE0gO1nrJuxDZbwAPLLBldeoiATpeL7ZhY0qLsnZVjM4kbEeOFRuM+cQ ixdDa5OJeZFoC4Z/uHZM+s47MKI+Elvm/7SnqUMZpycHamRwXIgtnZjTUwAxbO/jj4h7 iQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3ct1hyg7eh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 06 Dec 2021 22:51:54 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 6 Dec 2021 22:51:52 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 6 Dec 2021 22:51:52 -0800 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id E6CFD3F7071; Mon, 6 Dec 2021 22:51:49 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Anoob Joseph , Archana Muniganti , Tejasree Kondoj , Subject: [PATCH 13/25] crypto/cnxk: use struct sizes for ctx writes Date: Tue, 7 Dec 2021 12:20:46 +0530 Message-ID: <1638859858-734-14-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1638859858-734-1-git-send-email-anoobj@marvell.com> References: <1638859858-734-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: XePx76IJZkFseq5TofYzoy0KCNfa_RWS X-Proofpoint-GUID: XePx76IJZkFseq5TofYzoy0KCNfa_RWS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-07_02,2021-12-06_02,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org CTX writes only require the lengths are 8B aligned. Use the struct size directly. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cn10k_ipsec.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c index b4acbac..0832b53 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.c +++ b/drivers/crypto/cnxk/cn10k_ipsec.c @@ -52,14 +52,12 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, out_sa = &sa->out_sa; /* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */ - sa_dptr = plt_zmalloc(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ, 0); + sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_outb_sa), 8); if (sa_dptr == NULL) { plt_err("Couldn't allocate memory for SA dptr"); return -ENOMEM; } - memset(sa_dptr, 0, sizeof(struct roc_ot_ipsec_outb_sa)); - /* Translate security parameters to SA */ ret = cnxk_ot_ipsec_outb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm); if (ret) { @@ -133,7 +131,7 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, /* Write session using microcode opcode */ ret = roc_cpt_ctx_write(lf, sa_dptr, out_sa, - ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ); + sizeof(struct roc_ot_ipsec_outb_sa)); if (ret) { plt_err("Could not write outbound session to hardware"); goto sa_dptr_free; @@ -169,14 +167,12 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, in_sa = &sa->in_sa; /* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */ - sa_dptr = plt_zmalloc(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ, 0); + sa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_inb_sa), 8); if (sa_dptr == NULL) { plt_err("Couldn't allocate memory for SA dptr"); return -ENOMEM; } - memset(sa_dptr, 0, sizeof(struct roc_ot_ipsec_inb_sa)); - /* Translate security parameters to SA */ ret = cnxk_ot_ipsec_inb_sa_fill(sa_dptr, ipsec_xfrm, crypto_xfrm); if (ret) { @@ -225,7 +221,7 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, /* Write session using microcode opcode */ ret = roc_cpt_ctx_write(lf, sa_dptr, in_sa, - ROC_NIX_INL_OT_IPSEC_INB_HW_SZ); + sizeof(struct roc_ot_ipsec_inb_sa)); if (ret) { plt_err("Could not write inbound session to hardware"); goto sa_dptr_free; -- 2.7.4