From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 499C1A0032; Thu, 16 Dec 2021 18:53:06 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 308CD40DFD; Thu, 16 Dec 2021 18:53:06 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7240D40685 for ; Thu, 16 Dec 2021 18:53:04 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BGBdX0s030059 for ; Thu, 16 Dec 2021 09:53:03 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=82vfpzglZCyiv3FHCDO8TCYIavngPcI7B+XzQQ3JqaI=; b=KrL5O2tWiIZPu3SelMKwCXHbMo/HxU1h/ukoeZUyiAJK8dW5smxvAhx2XyjJ5tZqhFqe +j/igWIj9wJ9g5HwgVPUFTwavbEQR+xtseURL+Wu8tu8aPZhFi3p8RGnJ/BNtXafbyfz mzX+f1bwqcIBQKOCi8Oh1oqHMUhWLyiEV/5yhtUWj5Pq1x0Z2JU/aj8CMX4QbpV9U/xJ kSiqvJz1rqhbBXeelHtTgtvF3CXfdD5W53JOhJG79HwMixUBd1IDYvIW7mYbqFZf9sEk xa84HIW00pMAIFXA8vye3MnZFWKzFrrKE/RXADdq//nAqR8y1ANSZWcst9C7+F4oyB/C fw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3d04s71p00-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 16 Dec 2021 09:53:03 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 16 Dec 2021 09:53:02 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 16 Dec 2021 09:53:02 -0800 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id 05C553F7048; Thu, 16 Dec 2021 09:52:58 -0800 (PST) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Shijith Thotton , Archana Muniganti , Tejasree Kondoj , Subject: [PATCH v2 07/29] crypto/cnxk: only enable queues that are allocated Date: Thu, 16 Dec 2021 23:19:13 +0530 Message-ID: <1639676975-1316-8-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1639676975-1316-1-git-send-email-anoobj@marvell.com> References: <1638859858-734-1-git-send-email-anoobj@marvell.com> <1639676975-1316-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: fUk1SMI7FiMEHnDCTagZiuJDqIjjPWAp X-Proofpoint-ORIG-GUID: fUk1SMI7FiMEHnDCTagZiuJDqIjjPWAp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-16_06,2021-12-16_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Shijith Thotton Only enable/disable queue pairs that are allocated during cryptodev start/stop. Fixes: 6a95dbc1a291 ("crypto/cnxk: add dev start and dev stop") Signed-off-by: Shijith Thotton --- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index a2281fb..21ee09f 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -100,8 +100,13 @@ cnxk_cpt_dev_start(struct rte_cryptodev *dev) uint16_t nb_lf = roc_cpt->nb_lf; uint16_t qp_id; - for (qp_id = 0; qp_id < nb_lf; qp_id++) + for (qp_id = 0; qp_id < nb_lf; qp_id++) { + /* Application may not setup all queue pair */ + if (roc_cpt->lf[qp_id] == NULL) + continue; + roc_cpt_iq_enable(roc_cpt->lf[qp_id]); + } return 0; } @@ -114,8 +119,12 @@ cnxk_cpt_dev_stop(struct rte_cryptodev *dev) uint16_t nb_lf = roc_cpt->nb_lf; uint16_t qp_id; - for (qp_id = 0; qp_id < nb_lf; qp_id++) + for (qp_id = 0; qp_id < nb_lf; qp_id++) { + if (roc_cpt->lf[qp_id] == NULL) + continue; + roc_cpt_iq_disable(roc_cpt->lf[qp_id]); + } } int -- 2.7.4