From: Wei Huang <wei.huang@intel.com>
To: dev@dpdk.org, thomas@monjalon.net, nipun.gupta@nxp.com,
hemant.agrawal@nxp.com
Cc: stable@dpdk.org, rosen.xu@intel.com, tianfei.zhang@intel.com,
qi.z.zhang@intel.com, Wei Huang <wei.huang@intel.com>
Subject: [PATCH] raw/ifpga: avoid potential integer overflow
Date: Wed, 22 Jun 2022 23:11:40 -0400 [thread overview]
Message-ID: <1655953900-26199-1-git-send-email-wei.huang@intel.com> (raw)
Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga()
is evaluated using 32-bit arithmetic, which would overflow
potentially. Change tx_chunks to type "uint64_t" to avoid such
issue.
Coverity issue: 379203
Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")
Signed-off-by: Wei Huang <wei.huang@intel.com>
---
drivers/raw/ifpga/afu_pmd_n3000.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c b/drivers/raw/ifpga/afu_pmd_n3000.c
index 8708164..5120df5 100644
--- a/drivers/raw/ifpga/afu_pmd_n3000.c
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -1158,7 +1158,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx, uint64_t dst, uint64_t src,
uint64_t count_left = count;
uint64_t dma_chunks = 0;
uint64_t offset = 0;
- uint32_t tx_chunks = 0;
+ uint64_t tx_chunks = 0;
uint64_t *tmp_buf = NULL;
int ret = 0;
@@ -1213,7 +1213,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx, uint64_t dst, uint64_t src,
offset = tx_chunks * ctx->dma_buf_size;
count_left -= offset;
IFPGA_RAWDEV_PMD_DEBUG("0x%"PRIx64" --> 0x%"PRIx64
- " (%u...0x%"PRIx64")",
+ " (%"PRIu64"...0x%"PRIx64")",
src, dst, tx_chunks, count_left);
tmp_buf = (uint64_t *)rte_malloc(NULL, ctx->dma_buf_size,
DMA_ALIGN_BYTES);
--
1.8.3.1
next reply other threads:[~2022-06-23 3:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-23 3:11 Wei Huang [this message]
2022-06-23 5:52 ` Zhang, Tianfei
2022-06-26 10:16 ` Thomas Monjalon
2022-06-23 6:35 ` Xu, Rosen
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