From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 73AC442395; Tue, 10 Jan 2023 20:38:38 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1E3E642D11; Tue, 10 Jan 2023 20:38:33 +0100 (CET) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 45C6A40E25 for ; Tue, 10 Jan 2023 20:38:31 +0100 (CET) Received: by linux.microsoft.com (Postfix, from userid 1086) id 8CF7A20B4623; Tue, 10 Jan 2023 11:38:30 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 8CF7A20B4623 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1673379510; bh=kgDc0j/lU3u+GNfBph8LuhUyNtNd35oeXHGdeEg3DA4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VXdKf+AYLm+v8OHqtjIKPyB4VnI4FvcDtzIvCEwAxBzlbqaCZox1/YHV/6x5d/86J e+KUXeg8P/dNmozw8dmovE15/uY2eShQIMQzdfLtQW+SHYLbQ9CnetZI5bs8oYGRqj B4gu5xCwkUGWv2ZC045lo8wSeJGGjotVRy0hWi6c= From: Tyler Retzlaff To: dev@dpdk.org Cc: thomas@monjalon.net, mb@smartsharesystems.com, bruce.richardson@intel.com, ferruh.yigit@amd.com, Tyler Retzlaff Subject: [PATCH v5 2/2] eal: provide leading and trailing zero bit count abstraction Date: Tue, 10 Jan 2023 11:38:29 -0800 Message-Id: <1673379509-14746-3-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1673379509-14746-1-git-send-email-roretzla@linux.microsoft.com> References: <1669241687-18810-1-git-send-email-roretzla@linux.microsoft.com> <1673379509-14746-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Provide an abstraction for leading and trailing zero bit counting functions to hide compiler specific intrinsics and builtins. Include basic unit test of following functions added. rte_clz32 rte_clz64 rte_ctz32 rte_ctz64 Signed-off-by: Tyler Retzlaff --- app/test/meson.build | 2 + app/test/test_bitcount.c | 94 ++++++++++++++++++++++++ lib/eal/include/rte_bitops.h | 168 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 264 insertions(+) create mode 100644 app/test/test_bitcount.c diff --git a/app/test/meson.build b/app/test/meson.build index f34d19e..d1277bc 100644 --- a/app/test/meson.build +++ b/app/test/meson.build @@ -13,6 +13,7 @@ test_sources = files( 'test_alarm.c', 'test_atomic.c', 'test_barrier.c', + 'test_bitcount.c', 'test_bitops.c', 'test_bitmap.c', 'test_bpf.c', @@ -160,6 +161,7 @@ test_deps += ['bus_pci', 'bus_vdev'] fast_tests = [ ['acl_autotest', true, true], ['atomic_autotest', false, true], + ['bitcount_autotest', true, true], ['bitmap_autotest', true, true], ['bpf_autotest', true, true], ['bpf_convert_autotest', true, true], diff --git a/app/test/test_bitcount.c b/app/test/test_bitcount.c new file mode 100644 index 0000000..1359bed --- /dev/null +++ b/app/test/test_bitcount.c @@ -0,0 +1,94 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2022 Microsoft Corporation + */ + +#include +#include + +#include +#include + +#include "test.h" + +RTE_LOG_REGISTER(bitcount_logtype_test, test.bitcount, INFO); + +static int +test_clz32(void) +{ + size_t leading; + uint32_t v = 0xffffffff; + + for (leading = 0; v; leading++) { + RTE_TEST_ASSERT(rte_clz32(v) == leading, + "Unexpected count."); + v >>= 1; + } + + return 0; +} + +static int +test_clz64(void) +{ + size_t leading; + uint64_t v = 0xffffffffffffffff; + + for (leading = 0; v; leading++) { + RTE_TEST_ASSERT(rte_clz64(v) == leading, + "Unexpected count."); + v >>= 1; + } + + return 0; +} + +static int +test_ctz32(void) +{ + size_t trailing; + uint32_t v = 1; + + for (trailing = 0; v; trailing++) { + RTE_TEST_ASSERT(rte_ctz32(v) == trailing, + "Unexpected count."); + v <<= 1; + } + + return 0; +} + +static int +test_ctz64(void) +{ + size_t trailing; + uint64_t v = 1; + + for (trailing = 0; v; trailing++) { + RTE_TEST_ASSERT(rte_ctz64(v) == trailing, + "Unexpected count."); + v <<= 1; + } + + return 0; +} + +static struct unit_test_suite bitcount_test_suite = { + .suite_name = "bitcount autotest", + .setup = NULL, + .teardown = NULL, + .unit_test_cases = { + TEST_CASE(test_clz32), + TEST_CASE(test_clz64), + TEST_CASE(test_ctz32), + TEST_CASE(test_ctz64), + TEST_CASES_END() + } +}; + +static int +test_bitcount(void) +{ + return unit_test_suite_runner(&bitcount_test_suite); +} + +REGISTER_TEST_COMMAND(bitcount_autotest, test_bitcount); diff --git a/lib/eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h index 531479e..e578fc1 100644 --- a/lib/eal/include/rte_bitops.h +++ b/lib/eal/include/rte_bitops.h @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * Copyright(c) 2020 Arm Limited + * Copyright(c) 2010-2019 Intel Corporation + * Copyright(c) 2023 Microsoft Corporation */ #ifndef _RTE_BITOPS_H_ @@ -275,6 +277,172 @@ return val & mask; } +#ifdef RTE_TOOLCHAIN_MSVC + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of leading 0-bits in v. + * + * @param v + * The value. + * @return + * The count of leading zero bits. + */ +__rte_experimental +static inline unsigned int +rte_clz32(uint32_t v) +{ + unsigned long rv; + + (void)_BitScanReverse(&rv, v); + + return (unsigned int)(sizeof(v) * CHAR_BIT - 1 - rv); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of leading 0-bits in v. + * + * @param v + * The value. + * @return + * The count of leading zero bits. + */ +__rte_experimental +static inline unsigned int +rte_clz64(uint64_t v) +{ + unsigned long rv; + + (void)_BitScanReverse64(&rv, v); + + return (unsigned int)(sizeof(v) * CHAR_BIT - 1 - rv); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of trailing 0-bits in v. + * + * @param v + * The value. + * @return + * The count of trailing zero bits. + */ +__rte_experimental +static inline unsigned int +rte_ctz32(uint32_t v) +{ + unsigned long rv; + + (void)_BitScanForward(&rv, v); + + return (unsigned int)rv; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of trailing 0-bits in v. + * + * @param v + * The value. + * @return + * The count of trailing zero bits. + */ +__rte_experimental +static inline unsigned int +rte_ctz64(uint64_t v) +{ + unsigned long rv; + + (void)_BitScanForward64(&rv, v); + + return (unsigned int)rv; +} + +#else + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of leading 0-bits in v. + * + * @param v + * The value. + * @return + * The count of leading zero bits. + */ +__rte_experimental +static inline unsigned int +rte_clz32(uint32_t v) +{ + return (unsigned int)__builtin_clz(v); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of leading 0-bits in v. + * + * @param v + * The value. + * @return + * The count of leading zero bits. + */ +__rte_experimental +static inline unsigned int +rte_clz64(uint64_t v) +{ + return (unsigned int)__builtin_clzll(v); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of trailing 0-bits in v. + * + * @param v + * The value. + * @return + * The count of trailing zero bits. + */ +__rte_experimental +static inline unsigned int +rte_ctz32(uint32_t v) +{ + return (unsigned int)__builtin_ctz(v); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the count of trailing 0-bits in v. + * + * @param v + * The value. + * @return + * The count of trailing zero bits. + */ +__rte_experimental +static inline unsigned int +rte_ctz64(uint64_t v) +{ + return (unsigned int)__builtin_ctzll(v); +} + +#endif + /** * Combines 32b inputs most significant set bits into the least * significant bits to construct a value with the same MSBs as x -- 1.8.3.1