From: Tyler Retzlaff <roretzla@linux.microsoft.com>
To: dev@dpdk.org
Cc: Honnappa.Nagarahalli@arm.com, Ruifeng.Wang@arm.com,
thomas@monjalon.net,
Tyler Retzlaff <roretzla@linux.microsoft.com>
Subject: [PATCH 3/3] eal: use C11 memory model GCC builtin atomics
Date: Mon, 27 Mar 2023 07:30:20 -0700 [thread overview]
Message-ID: <1679927420-26737-4-git-send-email-roretzla@linux.microsoft.com> (raw)
In-Reply-To: <1679927420-26737-1-git-send-email-roretzla@linux.microsoft.com>
Replace use of __sync_fetch_and_add and __sync_fetch_and_sub with
__atomic_fetch_add and __atomic_fetch_sub.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
lib/eal/include/generic/rte_atomic.h | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/lib/eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
index 234b268..58df843 100644
--- a/lib/eal/include/generic/rte_atomic.h
+++ b/lib/eal/include/generic/rte_atomic.h
@@ -243,7 +243,7 @@
static inline void
rte_atomic16_add(rte_atomic16_t *v, int16_t inc)
{
- __sync_fetch_and_add(&v->cnt, inc);
+ __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST);
}
/**
@@ -257,7 +257,7 @@
static inline void
rte_atomic16_sub(rte_atomic16_t *v, int16_t dec)
{
- __sync_fetch_and_sub(&v->cnt, dec);
+ __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST);
}
/**
@@ -310,7 +310,7 @@
static inline int16_t
rte_atomic16_add_return(rte_atomic16_t *v, int16_t inc)
{
- return __sync_add_and_fetch(&v->cnt, inc);
+ return __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST) + inc;
}
/**
@@ -330,7 +330,7 @@
static inline int16_t
rte_atomic16_sub_return(rte_atomic16_t *v, int16_t dec)
{
- return __sync_sub_and_fetch(&v->cnt, dec);
+ return __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST) - dec;
}
/**
@@ -349,7 +349,7 @@
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
{
- return __sync_add_and_fetch(&v->cnt, 1) == 0;
+ return __atomic_fetch_add(&v->cnt, 1, __ATOMIC_SEQ_CST) + 1 == 0;
}
#endif
@@ -369,7 +369,7 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
{
- return __sync_sub_and_fetch(&v->cnt, 1) == 0;
+ return __atomic_fetch_sub(&v->cnt, 1, __ATOMIC_SEQ_CST) - 1 == 0;
}
#endif
@@ -522,7 +522,7 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline void
rte_atomic32_add(rte_atomic32_t *v, int32_t inc)
{
- __sync_fetch_and_add(&v->cnt, inc);
+ __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST);
}
/**
@@ -536,7 +536,7 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline void
rte_atomic32_sub(rte_atomic32_t *v, int32_t dec)
{
- __sync_fetch_and_sub(&v->cnt, dec);
+ __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST);
}
/**
@@ -589,7 +589,7 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline int32_t
rte_atomic32_add_return(rte_atomic32_t *v, int32_t inc)
{
- return __sync_add_and_fetch(&v->cnt, inc);
+ return __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST) + inc;
}
/**
@@ -609,7 +609,7 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline int32_t
rte_atomic32_sub_return(rte_atomic32_t *v, int32_t dec)
{
- return __sync_sub_and_fetch(&v->cnt, dec);
+ return __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST) - dec;
}
/**
@@ -628,7 +628,7 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
{
- return __sync_add_and_fetch(&v->cnt, 1) == 0;
+ return __atomic_fetch_add(&v->cnt, 1, __ATOMIC_SEQ_CST) + 1 == 0;
}
#endif
@@ -648,7 +648,7 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
{
- return __sync_sub_and_fetch(&v->cnt, 1) == 0;
+ return __atomic_fetch_sub(&v->cnt, 1, __ATOMIC_SEQ_CST) - 1 == 0;
}
#endif
@@ -854,7 +854,7 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline void
rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
{
- __sync_fetch_and_add(&v->cnt, inc);
+ __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST);
}
#endif
@@ -873,7 +873,7 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline void
rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
{
- __sync_fetch_and_sub(&v->cnt, dec);
+ __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST);
}
#endif
@@ -931,7 +931,7 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline int64_t
rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
{
- return __sync_add_and_fetch(&v->cnt, inc);
+ return __atomic_fetch_add(&v->cnt, inc, __ATOMIC_SEQ_CST) + inc;
}
#endif
@@ -955,7 +955,7 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline int64_t
rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
{
- return __sync_sub_and_fetch(&v->cnt, dec);
+ return __atomic_fetch_sub(&v->cnt, dec, __ATOMIC_SEQ_CST) - dec;
}
#endif
--
1.8.3.1
next prev parent reply other threads:[~2023-03-27 14:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 14:30 [PATCH 0/3] " Tyler Retzlaff
2023-03-27 14:30 ` [PATCH 1/3] bus/vmbus: " Tyler Retzlaff
2023-03-27 14:30 ` [PATCH 2/3] crypto/ccp: " Tyler Retzlaff
2023-03-27 14:30 ` Tyler Retzlaff [this message]
2023-03-27 15:25 ` [PATCH 0/3] " Morten Brørup
2023-05-24 12:51 ` David Marchand
2023-05-24 16:05 ` Tyler Retzlaff
2023-06-02 4:18 ` Tyler Retzlaff
2023-06-07 16:36 ` David Marchand
2023-06-07 16:46 ` David Marchand
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