From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by dpdk.org (Postfix) with ESMTP id 53C1C4C92 for ; Mon, 5 Nov 2018 07:55:49 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id C3E93226D9; Mon, 5 Nov 2018 01:55:48 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute1.internal (MEProxy); Mon, 05 Nov 2018 01:55:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=mesmtp; bh=55XKzqT01uMZpCM1ZhY+3dJoXwUQFOJubblwPWaBORA=; b=f2scIfHMWlz8 StP6xoxXyddJzwO/xRTKjnKlpQ7Kt2IJM6dB10fFx5n6Ai70ljno0buEhmszn3rW 3rGeZSb7y4dKsv7a0GeyUk0EXNMbrMr1G3Xn3OQOYf+IgaN3CPTF2hueHQU01zkG mOhcr4jedktOEbHpKl2Ydt1JVvDLn1w= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=55XKzqT01uMZpCM1ZhY+3dJoXwUQFOJubblwPWaBO RA=; b=uYDnZxQa7sgljqFvYNvXeMfctns9GgHz9GFuo8CCWsB0XDZnDcFddaYN8 I4mifBw8BRp5FC2QUacMxMKi0iWGOKzwUFiTtQll32RVbKK/jLOnHhTN00Drw+0S BQtuX8r3FRDvNcjnTVGwJ1EK+M9g1hXc9rhjCEagaoiUBdoNLytvjP1FvlRpEpkr 11Oert6gKV0RrgZ7BwBB3eNfgV3hQ+Re4A1HhItiL3SAUChu+Py+DfMWLs85cHFi YUOGcJeyroPK2SlPjbCEN7Jxd36E683ujlUUbPMeTHbZGP1jqQ8w99rFm5KQLT4I B8nHj/SxRooBFwnxy0X9CDzj3biZg== X-ME-Sender: X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id BB491102E0; Mon, 5 Nov 2018 01:55:46 -0500 (EST) From: Thomas Monjalon To: "Zhao1, Wei" Cc: Jerin Jacob , "Yigit, Ferruh" , "dev@dpdk.org" , "arybchenko@solarflare.com" , "olivier.matz@6wind.com" , "Zhang, Qi Z" , "Xing, Beilei" , "Lu, Wenzhuo" , "Ananyev, Konstantin" Date: Mon, 05 Nov 2018 07:55:43 +0100 Message-ID: <1702163.LgJrvV8fDE@xps> In-Reply-To: References: <20181026105559.GA6843@jerin> <20181101103346.GA17024@jerin> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] DEV_RX_OFFLOAD_VLAN_EXTEND offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Nov 2018 06:55:49 -0000 05/11/2018 05:22, Zhao1, Wei: > From: Jerin Jacob [mailto:jerin.jacob@caviumnetworks.com] > > From: "Zhao1, Wei" > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob > > > > From: Ferruh Yigit > > > > > On 10/26/2018 11:56 AM, Jerin Jacob wrote: > > > > > > > > > > > > Does anyone know the expectation of > > > > DEV_RX_OFFLOAD_VLAN_EXTEND > > > > > > offload? Does not look like it is documented. > > > > > > > > > > > > Looks like it is very specific to Intel controllers, Based on > > > > > > 82599 HRM, it is following, not sure what is the real > > > > > > expectation from NIC in normative terms. > > > > > > > > > > > > Extended VLAN. > > > > > > ------------- > > > > > > When set, all incoming Rx packets are expected to have at least > > > > > > one VLAN with the Ether type as defined in EXVET register. The > > > > > > packets can have an inner-VLAN that should be used for all > > > > > > filtering purposes. All Tx packets are expected to have at least > > > > > > one VLAN added to them by the host. In the case of an additional > > > > > > VLAN request (VLE), the inner-VLAN is added by the hardware > > > > > > after the outer-VLAN is > > > > added by the host. > > > > > > This bit should only be reset by a PCIe reset and should only be > > > > > > changed while Tx and Rx processes are stopped. > > > > > > The exception to this rule are MAC control packets such as flow > > > > > > control, 802.1x, LACP, etc. that never carry a VLAN tag of any > > > > > > type > > > > > > > > > > > > > > > > This looks similar to QinQ but it seems not, in ixgbe datasheet it has: > > > > > > > > Yes. QinQ there is an already an offload called > > > > DEV_RX_OFFLOAD_QINQ_STRIP > > > > > > Excuse me, I have some thought, is that right? > > > maybe DEV_RX_OFFLOAD_QINQ_STRIP and > > DEV_RX_OFFLOAD_VLAN_EXTEND is just two thing that play a different role > > each. > > > DEV_RX_OFFLOAD_VLAN_EXTEND tell NIC to recognize QinQ PACKETS, it is > > a filter for NIC. > > > DEV_RX_OFFLOAD_QINQ_STRIP tell nic to strip 2 inner and outer vlan head > > when moving packets from nic to host memory. > > > I40e NIC is the normative terms when handling qinq packets. > > > > Yes, it makes sense if the meaning of DEV_RX_OFFLOAD_VLAN_EXTEND is > > QINQ filter. But it looks like not, as .vlan_filter_set ethdev callback accepts > > only single vlan id as "uint16_t vlan_id". > > If it needs to be treated as QinQ filter then QinQ vlan_ids needs to be send > > to driver through some means. > > > > Yes, DEV_RX_OFFLOAD_VLAN_EXTEND can enable the qinq filter, but I do not find the way to config QinQ vlan_ids, > May be we need some means to send inner and outer vlan id to PMD, may be it is already exist but we do not find it. > I will check that and report in this mail if I get the result. > > > > > Probably we may need to deprecate these vlan API in long-term and > > enable it through rte_flow. > > Good idea! Generally speaking, all APIs which are also covered by rte_flow must be deprecated. We must migrate all PMDs to the new APIs.