From: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
To: <dev@dpdk.org>
Cc: <ferruh.yigit@intel.com>, <bluca@debian.org>,
<luoxianjun@huawei.com>, <luoxingyu@huawei.com>,
<zhouguoyang@huawei.com>, <yin.yinshi@huawei.com>,
<david.yangxiaoliang@huawei.com>, <zhaohui8@huawei.com>,
<zhengjingzhou@huawei.com>, <guojian365@huawei.com>,
Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
Subject: [dpdk-dev] [PATCH v1 3/4] net/hinic/base: modify vhd type for SDI
Date: Sat, 25 Jul 2020 11:48:24 +0800 [thread overview]
Message-ID: <1708e8d459d3888316a70d4eabfc3172c67eb0e9.1595648149.git.cloud.wangxiaoyun@huawei.com> (raw)
In-Reply-To: <cover.1595648149.git.cloud.wangxiaoyun@huawei.com>
For ovs offload scenario, when fw processes the virtio header,
there is no need to offset; and for standard card scenarios,
fw does not care about the vhd_type parameter, so in order to
be compatible with the two scenarios, use 0 offset instead.
Signed-off-by: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
---
drivers/net/hinic/base/hinic_pmd_nicio.c | 2 +-
drivers/net/hinic/base/hinic_pmd_nicio.h | 5 +++++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hinic/base/hinic_pmd_nicio.c b/drivers/net/hinic/base/hinic_pmd_nicio.c
index 2914e99..576fe59 100644
--- a/drivers/net/hinic/base/hinic_pmd_nicio.c
+++ b/drivers/net/hinic/base/hinic_pmd_nicio.c
@@ -578,7 +578,7 @@ int hinic_init_qp_ctxts(struct hinic_hwdev *hwdev)
rx_buf_sz = nic_io->rq_buf_size;
/* update rx buf size to function table */
- err = hinic_set_rx_vhd_mode(hwdev, 0, rx_buf_sz);
+ err = hinic_set_rx_vhd_mode(hwdev, HINIC_VHD_TYPE_0B, rx_buf_sz);
if (err) {
PMD_DRV_LOG(ERR, "Set rx vhd mode failed, rc: %d", err);
return err;
diff --git a/drivers/net/hinic/base/hinic_pmd_nicio.h b/drivers/net/hinic/base/hinic_pmd_nicio.h
index 9a487d0..600c073 100644
--- a/drivers/net/hinic/base/hinic_pmd_nicio.h
+++ b/drivers/net/hinic/base/hinic_pmd_nicio.h
@@ -8,6 +8,11 @@
#define RX_BUF_LEN_16K 16384
#define RX_BUF_LEN_1_5K 1536
+/* vhd type */
+#define HINIC_VHD_TYPE_0B 2
+#define HINIC_VHD_TYPE_10B 1
+#define HINIC_VHD_TYPE_12B 0
+
#define HINIC_Q_CTXT_MAX 42
/* performance: ci addr RTE_CACHE_SIZE(64B) alignment */
--
1.8.3.1
next prev parent reply other threads:[~2020-07-25 3:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-25 3:48 [dpdk-dev] [PATCH v1 0/4] some bugs fixes Xiaoyun wang
2020-07-25 3:48 ` [dpdk-dev] [PATCH v1 1/4] net/hinic: modify csum offload process Xiaoyun wang
2020-07-25 3:48 ` [dpdk-dev] [PATCH v1 2/4] net/hinic: optimize Rx performance for x86 Xiaoyun wang
2020-07-25 3:48 ` Xiaoyun wang [this message]
2020-07-25 3:48 ` [dpdk-dev] [PATCH v1 4/4] net/hinic/base: make timeout not affected by system time jump Xiaoyun wang
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