From: Tyler Retzlaff <roretzla@linux.microsoft.com>
To: dev@dpdk.org
Cc: "Mattias Rönnblom" <mattias.ronnblom@ericsson.com>,
"Morten Brørup" <mb@smartsharesystems.com>,
"Abdullah Sevincer" <abdullah.sevincer@intel.com>,
"Ajit Khaparde" <ajit.khaparde@broadcom.com>,
"Alok Prasad" <palok@marvell.com>,
"Anatoly Burakov" <anatoly.burakov@intel.com>,
"Andrew Rybchenko" <andrew.rybchenko@oktetlabs.ru>,
"Anoob Joseph" <anoobj@marvell.com>,
"Bruce Richardson" <bruce.richardson@intel.com>,
"Byron Marohn" <byron.marohn@intel.com>,
"Chenbo Xia" <chenbox@nvidia.com>,
"Chengwen Feng" <fengchengwen@huawei.com>,
"Ciara Loftus" <ciara.loftus@intel.com>,
"Ciara Power" <ciara.power@intel.com>,
"Dariusz Sosnowski" <dsosnowski@nvidia.com>,
"David Hunt" <david.hunt@intel.com>,
"Devendra Singh Rawat" <dsinghrawat@marvell.com>,
"Erik Gabriel Carrillo" <erik.g.carrillo@intel.com>,
"Guoyang Zhou" <zhouguoyang@huawei.com>,
"Harman Kalra" <hkalra@marvell.com>,
"Harry van Haaren" <harry.van.haaren@intel.com>,
"Honnappa Nagarahalli" <honnappa.nagarahalli@arm.com>,
"Jakub Grajciar" <jgrajcia@cisco.com>,
"Jerin Jacob" <jerinj@marvell.com>,
"Jeroen de Borst" <jeroendb@google.com>,
"Jian Wang" <jianwang@trustnetic.com>,
"Jiawen Wu" <jiawenwu@trustnetic.com>,
"Jie Hai" <haijie1@huawei.com>,
"Jingjing Wu" <jingjing.wu@intel.com>,
"Joshua Washington" <joshwash@google.com>,
"Joyce Kong" <joyce.kong@arm.com>,
"Junfeng Guo" <junfeng.guo@intel.com>,
"Kevin Laatz" <kevin.laatz@intel.com>,
"Konstantin Ananyev" <konstantin.v.ananyev@yandex.ru>,
"Liang Ma" <liangma@liangbit.com>,
"Long Li" <longli@microsoft.com>,
"Maciej Czekaj" <mczekaj@marvell.com>,
"Matan Azrad" <matan@nvidia.com>,
"Maxime Coquelin" <maxime.coquelin@redhat.com>,
"Nicolas Chautru" <nicolas.chautru@intel.com>,
"Ori Kam" <orika@nvidia.com>,
"Pavan Nikhilesh" <pbhagavatula@marvell.com>,
"Peter Mccarthy" <peter.mccarthy@intel.com>,
"Rahul Lakkireddy" <rahul.lakkireddy@chelsio.com>,
"Reshma Pattan" <reshma.pattan@intel.com>,
"Rosen Xu" <rosen.xu@intel.com>,
"Ruifeng Wang" <ruifeng.wang@arm.com>,
"Rushil Gupta" <rushilg@google.com>,
"Sameh Gobriel" <sameh.gobriel@intel.com>,
"Sivaprasad Tummala" <sivaprasad.tummala@amd.com>,
"Somnath Kotur" <somnath.kotur@broadcom.com>,
"Stephen Hemminger" <stephen@networkplumber.org>,
"Suanming Mou" <suanmingm@nvidia.com>,
"Sunil Kumar Kori" <skori@marvell.com>,
"Sunil Uttarwar" <sunilprakashrao.uttarwar@amd.com>,
"Tetsuya Mukawa" <mtetsuyah@gmail.com>,
"Vamsi Attunuru" <vattunuru@marvell.com>,
"Viacheslav Ovsiienko" <viacheslavo@nvidia.com>,
"Vladimir Medvedkin" <vladimir.medvedkin@intel.com>,
"Xiaoyun Wang" <cloud.wangxiaoyun@huawei.com>,
"Yipeng Wang" <yipeng1.wang@intel.com>,
"Yisen Zhuang" <yisen.zhuang@huawei.com>,
"Yuying Zhang" <Yuying.Zhang@intel.com>,
"Yuying Zhang" <yuying.zhang@intel.com>,
"Ziyang Xuan" <xuanziyang2@huawei.com>,
"Tyler Retzlaff" <roretzla@linux.microsoft.com>
Subject: [PATCH v2 28/45] common/mlx5: use rte stdatomic API
Date: Thu, 21 Mar 2024 12:17:15 -0700 [thread overview]
Message-ID: <1711048652-7512-29-git-send-email-roretzla@linux.microsoft.com> (raw)
In-Reply-To: <1711048652-7512-1-git-send-email-roretzla@linux.microsoft.com>
Replace the use of gcc builtin __atomic_xxx intrinsics with
corresponding rte_atomic_xxx optional rte stdatomic API.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
drivers/common/mlx5/linux/mlx5_nl.c | 5 +--
drivers/common/mlx5/mlx5_common.h | 2 +-
drivers/common/mlx5/mlx5_common_mr.c | 16 ++++-----
drivers/common/mlx5/mlx5_common_mr.h | 2 +-
drivers/common/mlx5/mlx5_common_utils.c | 32 +++++++++---------
drivers/common/mlx5/mlx5_common_utils.h | 6 ++--
drivers/common/mlx5/mlx5_malloc.c | 58 ++++++++++++++++-----------------
7 files changed, 61 insertions(+), 60 deletions(-)
diff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c
index 28a1f56..bf6dd19 100644
--- a/drivers/common/mlx5/linux/mlx5_nl.c
+++ b/drivers/common/mlx5/linux/mlx5_nl.c
@@ -175,10 +175,11 @@ struct mlx5_nl_port_info {
uint16_t state; /**< IB device port state (out). */
};
-uint32_t atomic_sn;
+RTE_ATOMIC(uint32_t) atomic_sn;
/* Generate Netlink sequence number. */
-#define MLX5_NL_SN_GENERATE (__atomic_fetch_add(&atomic_sn, 1, __ATOMIC_RELAXED) + 1)
+#define MLX5_NL_SN_GENERATE (rte_atomic_fetch_add_explicit(&atomic_sn, 1, \
+ rte_memory_order_relaxed) + 1)
/**
* Opens a Netlink socket.
diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h
index 9c80277..14c70ed 100644
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -195,7 +195,7 @@ enum mlx5_cqe_status {
/* Prevent speculative reading of other fields in CQE until
* CQE is valid.
*/
- rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
+ rte_atomic_thread_fence(rte_memory_order_acquire);
if (unlikely(op_code == MLX5_CQE_RESP_ERR ||
op_code == MLX5_CQE_REQ_ERR))
diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c
index 85ec10d..50922ad 100644
--- a/drivers/common/mlx5/mlx5_common_mr.c
+++ b/drivers/common/mlx5/mlx5_common_mr.c
@@ -35,7 +35,7 @@ struct mlx5_range {
/** Memory region for a mempool. */
struct mlx5_mempool_mr {
struct mlx5_pmd_mr pmd_mr;
- uint32_t refcnt; /**< Number of mempools sharing this MR. */
+ RTE_ATOMIC(uint32_t) refcnt; /**< Number of mempools sharing this MR. */
};
/* Mempool registration. */
@@ -56,11 +56,11 @@ struct mlx5_mempool_reg {
{
struct mlx5_mprq_buf *buf = opaque;
- if (__atomic_load_n(&buf->refcnt, __ATOMIC_RELAXED) == 1) {
+ if (rte_atomic_load_explicit(&buf->refcnt, rte_memory_order_relaxed) == 1) {
rte_mempool_put(buf->mp, buf);
- } else if (unlikely(__atomic_fetch_sub(&buf->refcnt, 1,
- __ATOMIC_RELAXED) - 1 == 0)) {
- __atomic_store_n(&buf->refcnt, 1, __ATOMIC_RELAXED);
+ } else if (unlikely(rte_atomic_fetch_sub_explicit(&buf->refcnt, 1,
+ rte_memory_order_relaxed) - 1 == 0)) {
+ rte_atomic_store_explicit(&buf->refcnt, 1, rte_memory_order_relaxed);
rte_mempool_put(buf->mp, buf);
}
}
@@ -1650,7 +1650,7 @@ struct mlx5_mempool_get_extmem_data {
unsigned int i;
for (i = 0; i < mpr->mrs_n; i++)
- __atomic_fetch_add(&mpr->mrs[i].refcnt, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mpr->mrs[i].refcnt, 1, rte_memory_order_relaxed);
}
/**
@@ -1665,8 +1665,8 @@ struct mlx5_mempool_get_extmem_data {
bool ret = false;
for (i = 0; i < mpr->mrs_n; i++)
- ret |= __atomic_fetch_sub(&mpr->mrs[i].refcnt, 1,
- __ATOMIC_RELAXED) - 1 == 0;
+ ret |= rte_atomic_fetch_sub_explicit(&mpr->mrs[i].refcnt, 1,
+ rte_memory_order_relaxed) - 1 == 0;
return ret;
}
diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h
index 8789d40..5bdf48a 100644
--- a/drivers/common/mlx5/mlx5_common_mr.h
+++ b/drivers/common/mlx5/mlx5_common_mr.h
@@ -93,7 +93,7 @@ struct mlx5_mr_share_cache {
/* Multi-Packet RQ buffer header. */
struct mlx5_mprq_buf {
struct rte_mempool *mp;
- uint16_t refcnt; /* Atomically accessed refcnt. */
+ RTE_ATOMIC(uint16_t) refcnt; /* Atomically accessed refcnt. */
struct rte_mbuf_ext_shared_info shinfos[];
/*
* Shared information per stride.
diff --git a/drivers/common/mlx5/mlx5_common_utils.c b/drivers/common/mlx5/mlx5_common_utils.c
index e69d068..4b95d35 100644
--- a/drivers/common/mlx5/mlx5_common_utils.c
+++ b/drivers/common/mlx5/mlx5_common_utils.c
@@ -81,14 +81,14 @@ struct mlx5_list *
while (entry != NULL) {
if (l_const->cb_match(l_const->ctx, entry, ctx) == 0) {
if (reuse) {
- ret = __atomic_fetch_add(&entry->ref_cnt, 1,
- __ATOMIC_RELAXED);
+ ret = rte_atomic_fetch_add_explicit(&entry->ref_cnt, 1,
+ rte_memory_order_relaxed);
DRV_LOG(DEBUG, "mlx5 list %s entry %p ref: %u.",
l_const->name, (void *)entry,
entry->ref_cnt);
} else if (lcore_index < MLX5_LIST_GLOBAL) {
- ret = __atomic_load_n(&entry->ref_cnt,
- __ATOMIC_RELAXED);
+ ret = rte_atomic_load_explicit(&entry->ref_cnt,
+ rte_memory_order_relaxed);
}
if (likely(ret != 0 || lcore_index == MLX5_LIST_GLOBAL))
return entry;
@@ -151,13 +151,13 @@ struct mlx5_list_entry *
{
struct mlx5_list_cache *c = l_inconst->cache[lcore_index];
struct mlx5_list_entry *entry = LIST_FIRST(&c->h);
- uint32_t inv_cnt = __atomic_exchange_n(&c->inv_cnt, 0,
- __ATOMIC_RELAXED);
+ uint32_t inv_cnt = rte_atomic_exchange_explicit(&c->inv_cnt, 0,
+ rte_memory_order_relaxed);
while (inv_cnt != 0 && entry != NULL) {
struct mlx5_list_entry *nentry = LIST_NEXT(entry, next);
- if (__atomic_load_n(&entry->ref_cnt, __ATOMIC_RELAXED) == 0) {
+ if (rte_atomic_load_explicit(&entry->ref_cnt, rte_memory_order_relaxed) == 0) {
LIST_REMOVE(entry, next);
if (l_const->lcores_share)
l_const->cb_clone_free(l_const->ctx, entry);
@@ -217,7 +217,7 @@ struct mlx5_list_entry *
entry->lcore_idx = (uint32_t)lcore_index;
LIST_INSERT_HEAD(&l_inconst->cache[lcore_index]->h,
entry, next);
- __atomic_fetch_add(&l_inconst->count, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&l_inconst->count, 1, rte_memory_order_relaxed);
DRV_LOG(DEBUG, "MLX5 list %s c%d entry %p new: %u.",
l_const->name, lcore_index,
(void *)entry, entry->ref_cnt);
@@ -254,7 +254,7 @@ struct mlx5_list_entry *
l_inconst->gen_cnt++;
rte_rwlock_write_unlock(&l_inconst->lock);
LIST_INSERT_HEAD(&l_inconst->cache[lcore_index]->h, local_entry, next);
- __atomic_fetch_add(&l_inconst->count, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&l_inconst->count, 1, rte_memory_order_relaxed);
DRV_LOG(DEBUG, "mlx5 list %s entry %p new: %u.", l_const->name,
(void *)entry, entry->ref_cnt);
return local_entry;
@@ -285,7 +285,7 @@ struct mlx5_list_entry *
{
struct mlx5_list_entry *gentry = entry->gentry;
- if (__atomic_fetch_sub(&entry->ref_cnt, 1, __ATOMIC_RELAXED) - 1 != 0)
+ if (rte_atomic_fetch_sub_explicit(&entry->ref_cnt, 1, rte_memory_order_relaxed) - 1 != 0)
return 1;
if (entry->lcore_idx == (uint32_t)lcore_idx) {
LIST_REMOVE(entry, next);
@@ -294,23 +294,23 @@ struct mlx5_list_entry *
else
l_const->cb_remove(l_const->ctx, entry);
} else {
- __atomic_fetch_add(&l_inconst->cache[entry->lcore_idx]->inv_cnt,
- 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&l_inconst->cache[entry->lcore_idx]->inv_cnt,
+ 1, rte_memory_order_relaxed);
}
if (!l_const->lcores_share) {
- __atomic_fetch_sub(&l_inconst->count, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_sub_explicit(&l_inconst->count, 1, rte_memory_order_relaxed);
DRV_LOG(DEBUG, "mlx5 list %s entry %p removed.",
l_const->name, (void *)entry);
return 0;
}
- if (__atomic_fetch_sub(&gentry->ref_cnt, 1, __ATOMIC_RELAXED) - 1 != 0)
+ if (rte_atomic_fetch_sub_explicit(&gentry->ref_cnt, 1, rte_memory_order_relaxed) - 1 != 0)
return 1;
rte_rwlock_write_lock(&l_inconst->lock);
if (likely(gentry->ref_cnt == 0)) {
LIST_REMOVE(gentry, next);
rte_rwlock_write_unlock(&l_inconst->lock);
l_const->cb_remove(l_const->ctx, gentry);
- __atomic_fetch_sub(&l_inconst->count, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_sub_explicit(&l_inconst->count, 1, rte_memory_order_relaxed);
DRV_LOG(DEBUG, "mlx5 list %s entry %p removed.",
l_const->name, (void *)gentry);
return 0;
@@ -377,7 +377,7 @@ struct mlx5_list_entry *
mlx5_list_get_entry_num(struct mlx5_list *list)
{
MLX5_ASSERT(list);
- return __atomic_load_n(&list->l_inconst.count, __ATOMIC_RELAXED);
+ return rte_atomic_load_explicit(&list->l_inconst.count, rte_memory_order_relaxed);
}
/********************* Hash List **********************/
diff --git a/drivers/common/mlx5/mlx5_common_utils.h b/drivers/common/mlx5/mlx5_common_utils.h
index ae15119..cb4d104 100644
--- a/drivers/common/mlx5/mlx5_common_utils.h
+++ b/drivers/common/mlx5/mlx5_common_utils.h
@@ -29,7 +29,7 @@
*/
struct mlx5_list_entry {
LIST_ENTRY(mlx5_list_entry) next; /* Entry pointers in the list. */
- uint32_t ref_cnt __rte_aligned(8); /* 0 means, entry is invalid. */
+ RTE_ATOMIC(uint32_t) ref_cnt __rte_aligned(8); /* 0 means, entry is invalid. */
uint32_t lcore_idx;
union {
struct mlx5_list_entry *gentry;
@@ -39,7 +39,7 @@ struct mlx5_list_entry {
struct mlx5_list_cache {
LIST_HEAD(mlx5_list_head, mlx5_list_entry) h;
- uint32_t inv_cnt; /* Invalid entries counter. */
+ RTE_ATOMIC(uint32_t) inv_cnt; /* Invalid entries counter. */
} __rte_cache_aligned;
/**
@@ -111,7 +111,7 @@ struct mlx5_list_const {
struct mlx5_list_inconst {
rte_rwlock_t lock; /* read/write lock. */
volatile uint32_t gen_cnt; /* List modification may update it. */
- volatile uint32_t count; /* number of entries in list. */
+ volatile RTE_ATOMIC(uint32_t) count; /* number of entries in list. */
struct mlx5_list_cache *cache[MLX5_LIST_MAX];
/* Lcore cache, last index is the global cache. */
};
diff --git a/drivers/common/mlx5/mlx5_malloc.c b/drivers/common/mlx5/mlx5_malloc.c
index c58c41d..ef6dabe 100644
--- a/drivers/common/mlx5/mlx5_malloc.c
+++ b/drivers/common/mlx5/mlx5_malloc.c
@@ -16,7 +16,7 @@ struct mlx5_sys_mem {
uint32_t init:1; /* Memory allocator initialized. */
uint32_t enable:1; /* System memory select. */
uint32_t reserve:30; /* Reserve. */
- struct rte_memseg_list *last_msl;
+ RTE_ATOMIC(struct rte_memseg_list *) last_msl;
/* last allocated rte memory memseg list. */
#ifdef RTE_LIBRTE_MLX5_DEBUG
uint64_t malloc_sys;
@@ -93,14 +93,14 @@ struct mlx5_sys_mem {
* different with the cached msl.
*/
if (addr && !mlx5_mem_check_msl(addr,
- (struct rte_memseg_list *)__atomic_load_n
- (&mlx5_sys_mem.last_msl, __ATOMIC_RELAXED))) {
- __atomic_store_n(&mlx5_sys_mem.last_msl,
+ (struct rte_memseg_list *)rte_atomic_load_explicit
+ (&mlx5_sys_mem.last_msl, rte_memory_order_relaxed))) {
+ rte_atomic_store_explicit(&mlx5_sys_mem.last_msl,
rte_mem_virt2memseg_list(addr),
- __ATOMIC_RELAXED);
+ rte_memory_order_relaxed);
#ifdef RTE_LIBRTE_MLX5_DEBUG
- __atomic_fetch_add(&mlx5_sys_mem.msl_update, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.msl_update, 1,
+ rte_memory_order_relaxed);
#endif
}
}
@@ -122,11 +122,11 @@ struct mlx5_sys_mem {
* to check if the memory belongs to rte memory.
*/
if (!mlx5_mem_check_msl(addr, (struct rte_memseg_list *)
- __atomic_load_n(&mlx5_sys_mem.last_msl, __ATOMIC_RELAXED))) {
+ rte_atomic_load_explicit(&mlx5_sys_mem.last_msl, rte_memory_order_relaxed))) {
if (!rte_mem_virt2memseg_list(addr))
return false;
#ifdef RTE_LIBRTE_MLX5_DEBUG
- __atomic_fetch_add(&mlx5_sys_mem.msl_miss, 1, __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.msl_miss, 1, rte_memory_order_relaxed);
#endif
}
return true;
@@ -185,8 +185,8 @@ struct mlx5_sys_mem {
mlx5_mem_update_msl(addr);
#ifdef RTE_LIBRTE_MLX5_DEBUG
if (addr)
- __atomic_fetch_add(&mlx5_sys_mem.malloc_rte, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.malloc_rte, 1,
+ rte_memory_order_relaxed);
#endif
return addr;
}
@@ -199,8 +199,8 @@ struct mlx5_sys_mem {
addr = malloc(size);
#ifdef RTE_LIBRTE_MLX5_DEBUG
if (addr)
- __atomic_fetch_add(&mlx5_sys_mem.malloc_sys, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.malloc_sys, 1,
+ rte_memory_order_relaxed);
#endif
return addr;
}
@@ -233,8 +233,8 @@ struct mlx5_sys_mem {
mlx5_mem_update_msl(new_addr);
#ifdef RTE_LIBRTE_MLX5_DEBUG
if (new_addr)
- __atomic_fetch_add(&mlx5_sys_mem.realloc_rte, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.realloc_rte, 1,
+ rte_memory_order_relaxed);
#endif
return new_addr;
}
@@ -246,8 +246,8 @@ struct mlx5_sys_mem {
new_addr = realloc(addr, size);
#ifdef RTE_LIBRTE_MLX5_DEBUG
if (new_addr)
- __atomic_fetch_add(&mlx5_sys_mem.realloc_sys, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.realloc_sys, 1,
+ rte_memory_order_relaxed);
#endif
return new_addr;
}
@@ -259,14 +259,14 @@ struct mlx5_sys_mem {
return;
if (!mlx5_mem_is_rte(addr)) {
#ifdef RTE_LIBRTE_MLX5_DEBUG
- __atomic_fetch_add(&mlx5_sys_mem.free_sys, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.free_sys, 1,
+ rte_memory_order_relaxed);
#endif
mlx5_os_free(addr);
} else {
#ifdef RTE_LIBRTE_MLX5_DEBUG
- __atomic_fetch_add(&mlx5_sys_mem.free_rte, 1,
- __ATOMIC_RELAXED);
+ rte_atomic_fetch_add_explicit(&mlx5_sys_mem.free_rte, 1,
+ rte_memory_order_relaxed);
#endif
rte_free(addr);
}
@@ -280,14 +280,14 @@ struct mlx5_sys_mem {
" free:%"PRIi64"\nRTE memory malloc:%"PRIi64","
" realloc:%"PRIi64", free:%"PRIi64"\nMSL miss:%"PRIi64","
" update:%"PRIi64"",
- __atomic_load_n(&mlx5_sys_mem.malloc_sys, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.realloc_sys, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.free_sys, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.malloc_rte, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.realloc_rte, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.free_rte, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.msl_miss, __ATOMIC_RELAXED),
- __atomic_load_n(&mlx5_sys_mem.msl_update, __ATOMIC_RELAXED));
+ rte_atomic_load_explicit(&mlx5_sys_mem.malloc_sys, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.realloc_sys, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.free_sys, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.malloc_rte, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.realloc_rte, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.free_rte, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.msl_miss, rte_memory_order_relaxed),
+ rte_atomic_load_explicit(&mlx5_sys_mem.msl_update, rte_memory_order_relaxed));
#endif
}
--
1.8.3.1
next prev parent reply other threads:[~2024-03-21 19:20 UTC|newest]
Thread overview: 248+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-20 20:50 [PATCH 00/46] use " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 01/46] net/mlx5: use rte " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 02/46] net/ixgbe: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 03/46] net/iavf: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 04/46] net/ice: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 05/46] net/i40e: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 06/46] net/hns3: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 07/46] net/bnxt: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 08/46] net/cpfl: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 09/46] net/af_xdp: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 10/46] net/octeon_ep: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 11/46] net/octeontx: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 12/46] net/cxgbe: " Tyler Retzlaff
2024-03-20 20:50 ` [PATCH 13/46] net/gve: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 14/46] net/memif: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 15/46] net/sfc: " Tyler Retzlaff
2024-03-21 18:11 ` Aaron Conole
2024-03-21 18:15 ` Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 16/46] net/thunderx: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 17/46] net/virtio: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 18/46] net/hinic: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 19/46] net/idpf: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 20/46] net/qede: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 21/46] net/ring: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 22/46] vdpa/mlx5: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 23/46] raw/ifpga: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 24/46] event/opdl: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 25/46] event/octeontx: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 26/46] event/dsw: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 27/46] dma/skeleton: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 28/46] crypto/octeontx: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 29/46] common/mlx5: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 30/46] common/idpf: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 31/46] common/iavf: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 32/46] baseband/acc: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 33/46] net/txgbe: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 34/46] net/null: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 35/46] event/dlb2: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 36/46] dma/idxd: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 37/46] crypto/ccp: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 38/46] common/cpt: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 39/46] bus/vmbus: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 40/46] examples: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 41/46] app/dumpcap: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 42/46] app/test: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 43/46] app/test-eventdev: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 44/46] app/test-crypto-perf: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 45/46] app/test-compress-perf: " Tyler Retzlaff
2024-03-20 20:51 ` [PATCH 46/46] app/test-bbdev: " Tyler Retzlaff
2024-03-21 15:33 ` [PATCH 00/46] use " Stephen Hemminger
2024-03-21 16:22 ` Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 00/45] " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 01/45] net/mlx5: use rte " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 02/45] net/ixgbe: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 03/45] net/iavf: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 04/45] net/ice: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 05/45] net/i40e: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 06/45] net/hns3: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 07/45] net/bnxt: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 08/45] net/cpfl: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 09/45] net/af_xdp: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 10/45] net/octeon_ep: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 11/45] net/octeontx: " Tyler Retzlaff
2024-03-21 19:16 ` [PATCH v2 12/45] net/cxgbe: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 13/45] net/gve: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 14/45] net/memif: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 15/45] net/thunderx: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 16/45] net/virtio: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 17/45] net/hinic: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 18/45] net/idpf: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 19/45] net/qede: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 20/45] net/ring: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 21/45] vdpa/mlx5: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 22/45] raw/ifpga: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 23/45] event/opdl: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 24/45] event/octeontx: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 25/45] event/dsw: " Tyler Retzlaff
2024-03-21 20:51 ` Mattias Rönnblom
2024-03-21 19:17 ` [PATCH v2 26/45] dma/skeleton: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 27/45] crypto/octeontx: " Tyler Retzlaff
2024-03-21 19:17 ` Tyler Retzlaff [this message]
2024-03-21 19:17 ` [PATCH v2 29/45] common/idpf: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 30/45] common/iavf: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 31/45] baseband/acc: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 32/45] net/txgbe: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 33/45] net/null: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 34/45] event/dlb2: " Tyler Retzlaff
2024-03-21 21:03 ` Mattias Rönnblom
2024-04-09 19:31 ` Sevincer, Abdullah
2024-03-21 19:17 ` [PATCH v2 35/45] dma/idxd: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 36/45] crypto/ccp: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 37/45] common/cpt: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 38/45] bus/vmbus: " Tyler Retzlaff
2024-03-21 21:12 ` Mattias Rönnblom
2024-03-21 21:34 ` Long Li
2024-03-22 7:04 ` Mattias Rönnblom
2024-03-22 19:32 ` Long Li
2024-03-22 19:34 ` Long Li
2024-03-25 16:41 ` Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 39/45] examples: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 40/45] app/dumpcap: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 41/45] app/test: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 42/45] app/test-eventdev: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 43/45] app/test-crypto-perf: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 44/45] app/test-compress-perf: " Tyler Retzlaff
2024-03-21 19:17 ` [PATCH v2 45/45] app/test-bbdev: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 00/45] use " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 01/45] net/mlx5: use rte " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 02/45] net/ixgbe: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 03/45] net/iavf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 04/45] net/ice: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 05/45] net/i40e: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 06/45] net/hns3: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 07/45] net/bnxt: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 08/45] net/cpfl: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 09/45] net/af_xdp: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 10/45] net/octeon_ep: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 11/45] net/octeontx: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 12/45] net/cxgbe: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 13/45] net/gve: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 14/45] net/memif: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 15/45] net/thunderx: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 16/45] net/virtio: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 17/45] net/hinic: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 18/45] net/idpf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 19/45] net/qede: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 20/45] net/ring: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 21/45] vdpa/mlx5: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 22/45] raw/ifpga: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 23/45] event/opdl: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 24/45] event/octeontx: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 25/45] event/dsw: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 26/45] dma/skeleton: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 27/45] crypto/octeontx: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 28/45] common/mlx5: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 29/45] common/idpf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 30/45] common/iavf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 31/45] baseband/acc: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 32/45] net/txgbe: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 33/45] net/null: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 34/45] event/dlb2: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 35/45] dma/idxd: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 36/45] crypto/ccp: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 37/45] common/cpt: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 38/45] bus/vmbus: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 39/45] examples: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 40/45] app/dumpcap: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 41/45] app/test: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 42/45] app/test-eventdev: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 43/45] app/test-crypto-perf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 44/45] app/test-compress-perf: " Tyler Retzlaff
2024-03-27 22:37 ` [PATCH v3 45/45] app/test-bbdev: " Tyler Retzlaff
2024-03-29 2:07 ` [PATCH v3 00/45] use " Tyler Retzlaff
2024-04-19 23:05 ` [PATCH v4 " Tyler Retzlaff
2024-04-19 23:05 ` [PATCH v4 01/45] net/mlx5: use rte " Tyler Retzlaff
2024-04-20 8:03 ` Morten Brørup
2024-04-19 23:06 ` [PATCH v4 02/45] net/ixgbe: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 03/45] net/iavf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 04/45] net/ice: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 05/45] net/i40e: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 06/45] net/hns3: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 07/45] net/bnxt: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 08/45] net/cpfl: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 09/45] net/af_xdp: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 10/45] net/octeon_ep: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 11/45] net/octeontx: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 12/45] net/cxgbe: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 13/45] net/gve: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 14/45] net/memif: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 15/45] net/thunderx: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 16/45] net/virtio: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 17/45] net/hinic: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 18/45] net/idpf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 19/45] net/qede: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 20/45] net/ring: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 21/45] vdpa/mlx5: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 22/45] raw/ifpga: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 23/45] event/opdl: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 24/45] event/octeontx: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 25/45] event/dsw: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 26/45] dma/skeleton: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 27/45] crypto/octeontx: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 28/45] common/mlx5: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 29/45] common/idpf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 30/45] common/iavf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 31/45] baseband/acc: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 32/45] net/txgbe: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 33/45] net/null: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 34/45] event/dlb2: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 35/45] dma/idxd: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 36/45] crypto/ccp: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 37/45] common/cpt: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 38/45] bus/vmbus: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 39/45] examples: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 40/45] app/dumpcap: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 41/45] app/test: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 42/45] app/test-eventdev: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 43/45] app/test-crypto-perf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 44/45] app/test-compress-perf: " Tyler Retzlaff
2024-04-19 23:06 ` [PATCH v4 45/45] app/test-bbdev: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 00/45] use " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 01/45] net/mlx5: use rte " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 02/45] net/ixgbe: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 03/45] net/iavf: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 04/45] net/ice: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 05/45] net/i40e: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 06/45] net/hns3: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 07/45] net/bnxt: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 08/45] net/cpfl: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 09/45] net/af_xdp: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 10/45] net/octeon_ep: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 11/45] net/octeontx: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 12/45] net/cxgbe: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 13/45] net/gve: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 14/45] net/memif: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 15/45] net/thunderx: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 16/45] net/virtio: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 17/45] net/hinic: " Tyler Retzlaff
2024-05-06 17:57 ` [PATCH v5 18/45] net/idpf: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 19/45] net/qede: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 20/45] net/ring: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 21/45] vdpa/mlx5: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 22/45] raw/ifpga: " Tyler Retzlaff
2024-05-07 10:06 ` Xu, Rosen
2024-05-06 17:58 ` [PATCH v5 23/45] event/opdl: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 24/45] event/octeontx: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 25/45] event/dsw: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 26/45] dma/skeleton: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 27/45] crypto/octeontx: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 28/45] common/mlx5: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 29/45] common/idpf: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 30/45] common/iavf: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 31/45] baseband/acc: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 32/45] net/txgbe: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 33/45] net/null: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 34/45] event/dlb2: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 35/45] dma/idxd: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 36/45] crypto/ccp: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 37/45] common/cpt: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 38/45] bus/vmbus: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 39/45] examples: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 40/45] app/dumpcap: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 41/45] app/test: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 42/45] app/test-eventdev: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 43/45] app/test-crypto-perf: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 44/45] app/test-compress-perf: " Tyler Retzlaff
2024-05-06 17:58 ` [PATCH v5 45/45] app/test-bbdev: " Tyler Retzlaff
2024-05-07 2:19 ` [PATCH v5 00/45] use " Patrick Robb
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