From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 5FE781B19C; Sat, 11 Nov 2017 15:34:15 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id E871C2090A; Sat, 11 Nov 2017 09:34:14 -0500 (EST) Received: from frontend1 ([10.202.2.160]) by compute1.internal (MEProxy); Sat, 11 Nov 2017 09:34:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=mesmtp; bh=zx8+XajMXP0ZIu10sFjeG7yX/x 3Do5RLRpYh0aaeXeo=; b=KFq0VO6aENqFqPKwG+f5zlorxnj8/KQ7jBa8nxDY/o A5+Cn8Y7JPZrmK/rOY4lb83c/0HYQqFQwTzj6h45zbdPyt3w89i7ee2J26UOcZj3 PJXGSlEQaYMCszZ+hkLIik8b2BRI8UiM75Z6j0BStwM6OHFAXyRdJRXJPQDfS+Fe 8= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=zx8+Xa jMXP0ZIu10sFjeG7yX/x3Do5RLRpYh0aaeXeo=; b=j4EJlE9hIYiFm47kQYNcnr IzcxwcMZyLTOQmeF3+W5/WVfFC1arFaY2Q1UHcPUGB9Pi5sF3GCfXJc3ovUEpj4D mY53FNDlqC9EWqOZY6KlbFrtXsQaX2l6+rhfnf1oxEqGShr7kGQRXpIlI9qJBIf6 0yFmy+rO98j0RPf/ZwirgfRVl+yHkdeYl38isKeYunWzNtEJzixT83wQ36uqIF4G IhOQtCy32LawmiorbbkGlvx+rPS5EY8fqnmMiJrOvVFuOU8CuF/5iPKoSKoLSKZW E+C68YKEq433ruQUfHcxUOBNc+CsLrywikjll3P17T7PQlJrZbSB3eUpRjcu054A == X-ME-Sender: Received: from xps.localnet (unknown [89.248.140.13]) by mail.messagingengine.com (Postfix) with ESMTPA id 79D4F7E1DB; Sat, 11 Nov 2017 09:34:14 -0500 (EST) From: Thomas Monjalon To: Zhiyong Yang Cc: dev@dpdk.org, stable@dpdk.org, jianfeng.tan@intel.com, yliu@fridaylinux.org, maxime.coquelin@redhat.com Date: Sat, 11 Nov 2017 15:34:13 +0100 Message-ID: <1724984.eyEFnyz4nt@xps> In-Reply-To: <20171109092124.54380-1-zhiyong.yang@intel.com> References: <20171109085519.62567-1-zhiyong.yang@intel.com> <20171109092124.54380-1-zhiyong.yang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v6] net/virtio: fix rxq intr config fails using vfio-pci X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Nov 2017 14:34:15 -0000 09/11/2017 10:21, Zhiyong Yang: > When running l3fwd-power to test virtio rxq interrupt using vfio > pci noiommu mode, startup fails. In the function virtio_read_caps, > the code if (flags & PCI_MSIX_ENABLE) intends to double check > if vfio msix is enabled or not. However, it is not enable at that > time. So use_msix is assigned to "0", not "1", which causes the > failure of configuring rxq intr in l3fwd-power. > This patch adds the function "vtpci_msix_detect" to detect the status > of msix when interrupt changes happen. > In the meanwhile, virtio_intr_enable/disable are introduced to wrap > rte_intr_enable/disable to enhance the ability to detect msix. > use_msix can indicate three different msix status by: > VIRTIO_MSIX_NONE (0) > VIRTIO_MSIX_DISABLED (1) > VIRTIO_MSIX_ENABLED (2) > > CC: stable@dpdk.org > CC: jianfeng.tan@intel.com > CC: yliu@fridaylinux.org > CC: maxime.coquelin@redhat.com > > Fixes: cb482cb3a305 ("net/virtio: fix MAC address read") > Signed-off-by: Zhiyong Yang > Acked-by: Jianfeng Tan > Acked-by: Maxime Coquelin Applied, thanks