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From: Thomas Monjalon <thomas@monjalon.net>
To: "pro_nic_dpdk@realtek.com" <pro_nic_dpdk@realtek.com>,
 =?UTF-8?B?546L6aKi?= <howard_wang@realsil.com.cn>
Cc: "dev@dpdk.org" <dev@dpdk.org>, Ferruh Yigit <ferruh.yigit@amd.com>
Subject: Re: =?UTF-8?B?562U5aSNOg==?= [PATCH v8 12/17] net/r8169: implement Tx
 path
Date: Tue, 19 Nov 2024 08:15:49 +0100
Message-ID: <1768763.QkHrqEjB74@thomas>
In-Reply-To: <6346d08bc2984c99bb0918397fec6962@realsil.com.cn>
References: <20241113092854.91445-1-howard_wang@realsil.com.cn>
 <2706952.BddDVKsqQX@thomas> <6346d08bc2984c99bb0918397fec6962@realsil.com.cn>
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Errors-To: dev-bounces@dpdk.org

The change below is replacing 1 rte_smp_rmb with 2 calls,
so no it is not what I am asking for.
Please could you check how to not calling this function at all?

This series is already merged in the main branch,
so any new change should be submitted as a new patch.

Thank you


19/11/2024 07:29, =E7=8E=8B=E9=A2=A2:
> Dear Thomas,
>=20
> After our discussion, we concluded that we can make the following changes=
=2E What do you think? Additionally, I may not have been very clear in my l=
ast email. Should I submit the entire series of changes as PATCH v9, or sho=
uld I respond with [PATCH v9 12/17] net/r8169: implement Tx path?
>=20
> static u32
> rtl_get_opts1(struct rtl_tx_desc *txd)
> {
> -	rte_smp_rmb();
>=20
> 	return rte_le_to_cpu_32(txd->opts1);
> }
>=20
> static void
> rtl_tx_clean(struct rtl_hw *hw, struct rtl_tx_queue *txq)
> {
> 		...
> 		tx_left =3D (rte_atomic_load_explicit(&txq->tx_tail,
> 						    rte_memory_order_relaxed) % nb_tx_desc) - head;
> 	}
>=20
> +	rte_smp_rmb();
>=20
> 	while (tx_left > 0) {
> 		txd =3D &txq->hw_ring[head];
>=20
> 		if (!enable_tx_no_close && (rtl_get_opts1(txd) & DescOwn))
> 			break;
> 		...
> }
>=20
>=20
> int
> rtl_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
> {
> 		...
> 		tx_left =3D (rte_atomic_load_explicit(&txq->tx_tail,
> 						    rte_memory_order_relaxed) % nb_tx_desc) - head;
> 	}
>=20
> +	rte_smp_rmb();
>=20
> 	while (tx_left > 0) {
> 		txd =3D &txq->hw_ring[head];
>=20
> 		status =3D rtl_get_opts1(txd);
>=20
> 		if (!enable_tx_no_close && (status & DescOwn))
> 			break;
>=20
> 		...
> }
>=20
> Best Regards,
> Howard Wang
>=20
> -----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6-----
> =E5=8F=91=E4=BB=B6=E4=BA=BA: Thomas Monjalon <thomas@monjalon.net>=20
> =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2024=E5=B9=B411=E6=9C=8818=E6=97=A5=
 22:59
> =E6=94=B6=E4=BB=B6=E4=BA=BA: pro_nic_dpdk@realtek.com; =E7=8E=8B=E9=A2=A2=
 <howard_wang@realsil.com.cn>
> =E6=8A=84=E9=80=81: dev@dpdk.org; Ferruh Yigit <ferruh.yigit@amd.com>
> =E4=B8=BB=E9=A2=98: Re: [PATCH v8 12/17] net/r8169: implement Tx path
>=20
>=20
> External mail.
>=20
>=20
>=20
> Hello,
>=20
> 13/11/2024 10:28, Howard Wang:
> > +static u32
> > +rtl_get_opts1(struct rtl_tx_desc *txd) {
> > +       rte_smp_rmb();
> > +
> > +       return rte_le_to_cpu_32(txd->opts1); }
>=20
> We should avoid using such heavy memory barrier.
> Is it possible to use a lighter fence or atomic API?
>=20
>=20
>=20