From: Thomas Monjalon <thomas.monjalon@6wind.com>
To: xuelin.shi@freescale.com
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH v3] ixgbe: fix data access on big endian cpu
Date: Fri, 10 Jul 2015 16:51:34 +0200 [thread overview]
Message-ID: <1774489.naxWROzf8E@xps13> (raw)
In-Reply-To: <2601191342CEEE43887BDE71AB97725821415A5B@irsmsx105.ger.corp.intel.com>
Xuelin, have you given up with that patch?
2015-04-14 23:11, Ananyev, Konstantin:
> From: xuelin.shi@freescale.com [mailto:xuelin.shi@freescale.com]
> > txd->read.olinfo_status =
> > - rte_cpu_to_le_32(olinfo_status);
> > + rte_cpu_to_le_32(olinfo_status);
> > +
>
> Not sure, what had changed here?
> > @@ -2293,7 +2314,8 @@ ixgbe_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
> > rxdp = &(rxq->rx_ring[rxq->rx_tail]);
> >
> > while ((desc < rxq->nb_rx_desc) &&
> > - (rxdp->wb.upper.status_error & IXGBE_RXDADV_STAT_DD)) {
> > + (rte_le_to_cpu_32(rxdp->wb.upper.status_error) &
> > + IXGBE_RXDADV_STAT_DD)) {
>
> Why not ' rxdp->wb.upper.status_error & rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD)'?
> To keep it consistent with rest of the changes?
next prev parent reply other threads:[~2015-07-10 14:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-31 7:25 xuelin.shi
2015-04-02 20:18 ` Butler, Siobhan A
2015-04-03 2:02 ` Xuelin Shi
2015-04-14 23:11 ` Ananyev, Konstantin
2015-07-10 14:51 ` Thomas Monjalon [this message]
2015-07-16 7:49 ` Xuelin Shi
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