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From: Thomas Monjalon <thomas.monjalon@6wind.com>
To: Neil Horman <nhorman@tuxdriver.com>
Cc: dev@dpdk.org, Chao Zhu <chaozhu@linux.vnet.ibm.com>
Subject: Re: [dpdk-dev] [PATCH] Fix KNI compiling issue on IBM Power
Date: Thu, 04 Dec 2014 14:47:03 +0100	[thread overview]
Message-ID: <1795169.cqFrYtuj77@xps13> (raw)
In-Reply-To: <20141204132939.GB16249@hmsreliant.think-freely.org>

2014-12-04 08:29, Neil Horman:
> On Thu, Dec 04, 2014 at 12:59:31PM +0100, Thomas Monjalon wrote:
> > > Because of different cache line size, the alignment of struct
> > > rte_kni_mbuf in rte_kni_common.h doesn't work on IBM Power. This patch
> > > changed from 64 to RTE_CACHE_LINE_SIZE micro to do the alignment.
> > > 
> > > Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
> > 
> > Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
> > 
> > Applied
> > 
> Woah!  Slow down here, I'm not sure if this makes sense to fix his way.  The
> exact same ifndef/define/endif construct is used for this macro in rte_memory.h.
> Currently their defined to the same vaule, but if that ever changes, this macro
> will return different values based on the order in which header files are
> included.  That doesn't seem appropriate at all.

I agree (was my comment) but the patch was applied as a hot fix.
A better fix has to be found for DPDK 2.0.
Do you agree this fix is enough for DPDK 1.8 release?

> > I wonder if we could try to guess the cache line size instead of
> > configuring it in many places.
> > Maybe we could use something like sysconf(_SC_LEVEL1_DCACHE_LINESIZE)?
> > 
> This is a good idea, but I think its a bit broken for a few reasons:
> 
> 1) _SC_LEVEL1_DCACHE_LINESIZE I don't think is POSIX mandated, so there is every
> possibility that the above won't work on BSD
> 
> 2) While getting the cache line size dynamically is a great idea, dpdk has
> several locations that size structures based on processor cache line size, which
> implicitly requires a static cache line definition.

It can be guessed dynamically in the first build step (kind of configure).

> It seems the right thing to do, in my mind is to define RTE_CACHE_LINE_SIZE per
> arch (perhaps in common/include/arch/<arch>/rte_<something>.h), then just let
> the build break if a given arch doesn't define it (i.e. make definig that value
> an arch reqirement).

It's the other option. For IBM Power, it's currently overwritten in the Makefile:
	http://dpdk.org/browse/dpdk/tree/mk/arch/ppc_64/rte.vars.mk

Thanks for helping to find a better solution.
-- 
Thomas

  reply	other threads:[~2014-12-04 13:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-04 10:14 [dpdk-dev] [PATCH] Fix KNI compiling " Chao Zhu
2014-12-04 10:14 ` [dpdk-dev] [PATCH] Fix KNI compiling issue " Chao Zhu
2014-12-04 11:59   ` Thomas Monjalon
2014-12-04 13:29     ` Neil Horman
2014-12-04 13:47       ` Thomas Monjalon [this message]
2014-12-04 15:32         ` Neil Horman
2014-12-04 15:59           ` Thomas Monjalon
2014-12-04 20:05             ` Neil Horman
2014-12-05  9:11               ` Chao Zhu
2014-12-05 13:10               ` Thomas Monjalon
2014-12-05 14:42                 ` Neil Horman
2014-12-05 14:52                   ` Thomas Monjalon

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