From: Thomas Monjalon <thomas.monjalon@6wind.com>
To: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Cc: dev@dpdk.org, fiona.trahe@intel.com, john.griffin@intel.com,
deepak.k.jain@intel.com
Subject: Re: [dpdk-dev] [PATCH] qat: change optimization flag for Intel QuickAssist Technology
Date: Fri, 13 May 2016 10:17:43 +0200 [thread overview]
Message-ID: <1802357.As1ss59lSu@xps13> (raw)
In-Reply-To: <1462872255-13100-1-git-send-email-arkadiuszx.kusztal@intel.com>
2016-05-10 10:24, Arek Kusztal:
> From: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>
>
> Changed to -O3 optimization flag in Intel QuickAssist Technology Makefile
There is another change below. Should it be a separate patch?
> --- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
> +++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
> @@ -616,10 +616,12 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
> * Write (the length of AAD) into bytes 16-19 of state2
> * in big-endian format. This field is 8 bytes
> */
> - *(uint32_t *)&(hash->sha.state1[
> + uint32_t *aad_len = (uint32_t *)&hash->sha.state1[
> ICP_QAT_HW_GALOIS_128_STATE1_SZ +
> - ICP_QAT_HW_GALOIS_H_SZ]) =
> - rte_bswap32(add_auth_data_length);
> + ICP_QAT_HW_GALOIS_H_SZ];
> +
> + *aad_len = rte_bswap32(add_auth_data_length);
> +
> proto = ICP_QAT_FW_LA_GCM_PROTO;
> } else if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2) {
> proto = ICP_QAT_FW_LA_SNOW_3G_PROTO;
>
next prev parent reply other threads:[~2016-05-13 8:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-10 9:24 Arek Kusztal
2016-05-10 9:56 ` Jain, Deepak K
2016-05-13 8:17 ` Thomas Monjalon [this message]
2016-05-13 8:24 ` Jain, Deepak K
2016-05-31 11:29 ` De Lara Guarch, Pablo
2016-06-07 14:56 ` Thomas Monjalon
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