* [PATCH] config/arm: fix meson for native instruction set Arm CPUs
@ 2025-03-19 10:25 Gregory Etelson
2025-03-19 11:02 ` [EXTERNAL] " Pavan Nikhilesh Bhagavatula
0 siblings, 1 reply; 4+ messages in thread
From: Gregory Etelson @ 2025-03-19 10:25 UTC (permalink / raw)
To: dev
Cc: getelson, ,
rasland, Wathsala Vithanage, Bruce Richardson, Jerin Jacob,
Pavan Nikhilesh
Arm meson.build unconditionally relays on the `extra_features`
member of SoC configuration.
SoC dictionary is populated for Arm CPUs with generic instruction set
only.
For Arm CPUs with native CPU instruction set the SoC dictionary is
empty.
meson setup failed for the BlueField-3 because it belongs to
the native Arm CPU instruction set.
The patch adds global definition for extra_features.
Fixes: 7829776d0abf ("config/arm: add extra -march features")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
config/arm/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/config/arm/meson.build b/config/arm/meson.build
index a97a28ebb7..f971ed3c1b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -767,6 +767,7 @@ dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
update_flags = false
soc_flags = []
+extra_features = []
if dpdk_conf.get('RTE_ARCH_32')
# 32-bit build
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
--
2.45.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [EXTERNAL] [PATCH] config/arm: fix meson for native instruction set Arm CPUs
2025-03-19 10:25 [PATCH] config/arm: fix meson for native instruction set Arm CPUs Gregory Etelson
@ 2025-03-19 11:02 ` Pavan Nikhilesh Bhagavatula
2025-03-19 11:10 ` Pavan Nikhilesh Bhagavatula
0 siblings, 1 reply; 4+ messages in thread
From: Pavan Nikhilesh Bhagavatula @ 2025-03-19 11:02 UTC (permalink / raw)
To: Gregory Etelson, dev
Cc: mkashani, rasland, Wathsala Vithanage, Bruce Richardson, Jerin Jacob
Hi Gregory,
> Arm meson.build unconditionally relays on the `extra_features`
> member of SoC configuration.
>
> SoC dictionary is populated for Arm CPUs with generic instruction set
> only.
> For Arm CPUs with native CPU instruction set the SoC dictionary is
> empty.
>
> meson setup failed for the BlueField-3 because it belongs to
> the native Arm CPU instruction set.
>
> The patch adds global definition for extra_features.
>
> Fixes: 7829776d0abf ("config/arm: add extra -march features")
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> ---
> config/arm/meson.build | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index a97a28ebb7..f971ed3c1b 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -767,6 +767,7 @@ dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
>
> update_flags = false
> soc_flags = []
> +extra_features = []
We do set the default to be [] when extra_march_features is not found
In soc_config.
extra_features = soc_config.get('extra_march_features', [])
I have tested cross build[1] of bluefield3 with both meson 1.7.0 and 0.61.2
and didn’t see any failure which version of meson are you using?
[1]meson build --cross-file config/arm/arm64_bluefield3_linux_gcc
Thanks,
Pavan.
> if dpdk_conf.get('RTE_ARCH_32')
> # 32-bit build
> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> --
> 2.45.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [EXTERNAL] [PATCH] config/arm: fix meson for native instruction set Arm CPUs
2025-03-19 11:02 ` [EXTERNAL] " Pavan Nikhilesh Bhagavatula
@ 2025-03-19 11:10 ` Pavan Nikhilesh Bhagavatula
2025-03-19 11:48 ` Thomas Monjalon
0 siblings, 1 reply; 4+ messages in thread
From: Pavan Nikhilesh Bhagavatula @ 2025-03-19 11:10 UTC (permalink / raw)
To: Pavan Nikhilesh Bhagavatula, Gregory Etelson, dev
Cc: mkashani, rasland, Wathsala Vithanage, Bruce Richardson, Jerin Jacob
> Hi Gregory,
>
> > Arm meson.build unconditionally relays on the `extra_features`
> > member of SoC configuration.
> >
> > SoC dictionary is populated for Arm CPUs with generic instruction set
> > only.
> > For Arm CPUs with native CPU instruction set the SoC dictionary is
> > empty.
> >
> > meson setup failed for the BlueField-3 because it belongs to
> > the native Arm CPU instruction set.
> >
> > The patch adds global definition for extra_features.
> >
> > Fixes: 7829776d0abf ("config/arm: add extra -march features")
> > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> > ---
> > config/arm/meson.build | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/config/arm/meson.build b/config/arm/meson.build
> > index a97a28ebb7..f971ed3c1b 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -767,6 +767,7 @@ dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> >
> > update_flags = false
> > soc_flags = []
> > +extra_features = []
>
I re-checked with arm64 native compilation and see the issue.
Thanks,
Pavan.
> We do set the default to be [] when extra_march_features is not found
> In soc_config.
>
> extra_features = soc_config.get('extra_march_features', [])
>
> I have tested cross build[1] of bluefield3 with both meson 1.7.0 and 0.61.2
> and didn’t see any failure which version of meson are you using?
>
> [1]meson build --cross-file config/arm/arm64_bluefield3_linux_gcc
>
> Thanks,
> Pavan.
>
>
> > if dpdk_conf.get('RTE_ARCH_32')
> > # 32-bit build
> > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> > --
> > 2.45.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [EXTERNAL] [PATCH] config/arm: fix meson for native instruction set Arm CPUs
2025-03-19 11:10 ` Pavan Nikhilesh Bhagavatula
@ 2025-03-19 11:48 ` Thomas Monjalon
0 siblings, 0 replies; 4+ messages in thread
From: Thomas Monjalon @ 2025-03-19 11:48 UTC (permalink / raw)
To: Gregory Etelson
Cc: Pavan Nikhilesh Bhagavatula, dev, mkashani, rasland,
Wathsala Vithanage, Bruce Richardson, Jerin Jacob
19/03/2025 12:10, Pavan Nikhilesh Bhagavatula:
> > Hi Gregory,
> >
> > > Arm meson.build unconditionally relays on the `extra_features`
> > > member of SoC configuration.
> > >
> > > SoC dictionary is populated for Arm CPUs with generic instruction set
> > > only.
> > > For Arm CPUs with native CPU instruction set the SoC dictionary is
> > > empty.
> > >
> > > meson setup failed for the BlueField-3 because it belongs to
> > > the native Arm CPU instruction set.
> > >
> > > The patch adds global definition for extra_features.
> > >
> > > Fixes: 7829776d0abf ("config/arm: add extra -march features")
> > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
>
> Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-03-19 10:25 [PATCH] config/arm: fix meson for native instruction set Arm CPUs Gregory Etelson
2025-03-19 11:02 ` [EXTERNAL] " Pavan Nikhilesh Bhagavatula
2025-03-19 11:10 ` Pavan Nikhilesh Bhagavatula
2025-03-19 11:48 ` Thomas Monjalon
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