From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 66519A0C4B; Tue, 2 Nov 2021 20:05:00 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 50BC74069F; Tue, 2 Nov 2021 20:05:00 +0100 (CET) Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by mails.dpdk.org (Postfix) with ESMTP id 3A0C140689 for ; Tue, 2 Nov 2021 20:04:59 +0100 (CET) Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 8AA6D5C01C0; Tue, 2 Nov 2021 15:04:57 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Tue, 02 Nov 2021 15:04:57 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= kB4ou8Htn8aYx3jt9+6Fm8HoJA6OI2NvC1tXtJ92hVM=; b=dfrpm40WRskc+FGs jw0kZLw5tKUC1V2idvVu4ERGo60UniO7aET7IzcjJXFMnVEitkm8EZicwVmYiXOP GcjGGDdBaRqgq9V2d/XSUxXjKrP0y1OMocjZkmYFWm7JcBiBwvxAr/PqDQjVLLOS /syrHIrcUqPKDKp75VzVS26E38xZLF2dov3H4eIYLPCIIXLo5uM1NkxG0saW5O52 2BYhWUCYWfUAcunPFPGJC/ZOnLE/uYTrMDBwcvMeedV7BSjcUzgmUZAVgReBIDhQ pPQ5TzFkaB1/52BdDHzmlkSprNdkSOmB60uTs0qdtq9MuFRb/eF6Bst46VdkODiF l7nRww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=kB4ou8Htn8aYx3jt9+6Fm8HoJA6OI2NvC1tXtJ92h VM=; b=Vd9YaPba0Oy6hUM+ceeGW3ZEwOgcOUuDYQGWGYgPwEXDVC17hZopRheCt pwKKqhnjZ7v51xANLcNPmNi7ayDUE95TcSAZEHPq7YcHbTPs3brNrIwKrCasIbtY 9vmYFyRrdYYCIpv1JMkMDxx2bSWNoID5DstNC8C7LaoM1x3LQT3zElSO7Pbty9Fu CJg4QmvivU8ctud25HryNED6b7iN2L2JsssEVAcdi+DV+AOiupLJHsuY6Nin/uz/ ATylg9qyFlmWiAyl5PgE+tg19OqY09EPs6HfGK4+1xREGY6DW1nheOe42JhEXI8d IXD/94tDH3Wkg4yeJ5I1XMXFinbIA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvuddrtddtgdelhecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpeffvdffjeeuteelfeeileduudeugfetjeelveefkeejfeeigeehteff vdekfeegudenucffohhmrghinhepughpughkrdhorhhgnecuvehluhhsthgvrhfuihiivg eptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhhonhdr nhgvth X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 2 Nov 2021 15:04:56 -0400 (EDT) From: Thomas Monjalon To: Aman Kumar , David Marchand , "Song, Keesang" Cc: dev Date: Tue, 02 Nov 2021 20:04:54 +0100 Message-ID: <1902057.C4l9sbjloW@thomas> In-Reply-To: References: <20211102145253.413467-1-aman.kumar@vvdntech.in> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] config/x86: add support for AMD platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 02/11/2021 19:45, David Marchand: > On Tue, Nov 2, 2021 at 3:53 PM Aman Kumar wrote: > > > > -Dcpu_instruction_set=znverX meson option can be used > > to build dpdk for AMD platforms. Supported options are > > znver1, znver2 and znver3. > > > > Signed-off-by: Aman Kumar > > --- > > config/x86/meson.build | 9 +++++++++ > > doc/guides/linux_gsg/build_dpdk.rst | 2 +- > > 2 files changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/config/x86/meson.build b/config/x86/meson.build > > index 29f3dea181..21cda6fd33 100644 > > --- a/config/x86/meson.build > > +++ b/config/x86/meson.build > > @@ -72,3 +72,12 @@ endif > > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > > dpdk_conf.set('RTE_MAX_LCORE', 128) > > dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) > > + > > +# AMD platform support > > +if get_option('cpu_instruction_set') == 'znver1' > > + dpdk_conf.set('RTE_MAX_LCORE', 256) > > +elif get_option('cpu_instruction_set') == 'znver2' > > + dpdk_conf.set('RTE_MAX_LCORE', 512) > > +elif get_option('cpu_instruction_set') == 'znver3' > > + dpdk_conf.set('RTE_MAX_LCORE', 512) > > +endif > > I already replied to a similar patch earlier in this release. > https://inbox.dpdk.org/dev/CAJFAV8z-5amvEnr3mazkTqH-7SZX_C6EqCua6UdMXXHgrcmT6g@mail.gmail.com/ > > So repeating the same: do you actually _need_ more than 128 lcores in > a single DPDK application? Yes I forgot this previous discussion concluding that we should not increase more than 128 threads. The --lcores syntax and David's work on rte_thread_register should unblock most of use cases.